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Commit 2b5642e1 authored by Karthikeyan Ramasubramanian's avatar Karthikeyan Ramasubramanian
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ARM: dts: msm: Add QUPv3 related entries for SDM855 



Configure various instances of QUPv3 core present in SDM855 so that
it can enable various wired peripheral protocols.

CRs-Fixed: 2124301
Change-Id: Id0c136be5cf296b2ca50a65ee09732a091fb6c55
Signed-off-by: default avatarKarthikeyan Ramasubramanian <kramasub@codeaurora.org>
parent c35eaf7d

arch/arm64/boot/dts/qcom/sdm855-qupv3.dtsi

0 → 100644
+57 −0
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/* Copyright (c) 2017, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include <dt-bindings/msm/msm-bus-ids.h>



&soc {

	/* QUPv3 South Instances */

	qupv3_0: qcom,qupv3_0_geni_se@8c0000 {

		compatible = "qcom,qupv3-geni-se";

		reg = <0x8c0000 0x6000>;

		qcom,bus-mas-id = <MSM_BUS_MASTER_BLSP_1>;

		qcom,bus-slv-id = <MSM_BUS_SLAVE_EBI_CH0>;

		qcom,iommu-s1-bypass;



		iommu_qupv3_0_geni_se_cb: qcom,iommu_qupv3_0_geni_se_cb {

			compatible = "qcom,qupv3-geni-se-cb";

			iommus = <&apps_smmu 0xc3 0x0>;

		};

	};



	/* QUPv3 North Instances */

	qupv3_1: qcom,qupv3_1_geni_se@ac0000 {

		compatible = "qcom,qupv3-geni-se";

		reg = <0xac0000 0x6000>;

		qcom,bus-mas-id = <MSM_BUS_MASTER_BLSP_2>;

		qcom,bus-slv-id = <MSM_BUS_SLAVE_EBI_CH0>;

		qcom,iommu-s1-bypass;



		iommu_qupv3_1_geni_se_cb: qcom,iommu_qupv3_1_geni_se_cb {

			compatible = "qcom,qupv3-geni-se-cb";

			iommus = <&apps_smmu 0x603 0x0>;

		};

	};



	/* QUPv3 East Instances */

	qupv3_2: qcom,qupv3_2_geni_se@cc0000 {

		compatible = "qcom,qupv3-geni-se";

		reg = <0xcc0000 0x6000>;

		qcom,bus-mas-id = <MSM_BUS_MASTER_BLSP_2>;

		qcom,bus-slv-id = <MSM_BUS_SLAVE_EBI_CH0>;

		qcom,iommu-s1-bypass;



		iommu_qupv3_2_geni_se_cb: qcom,iommu_qupv3_2_geni_se_cb {

			compatible = "qcom,qupv3-geni-se-cb";

			iommus = <&apps_smmu 0x7a3 0x0>;

		};

	};

};

arch/arm64/boot/dts/qcom/sdm855.dtsi

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@@ -1570,3 +1570,4 @@ 
#include "sdm855-smp2p.dtsi"

#include "sdm855-coresight.dtsi"

#include "msm-arm-smmu-sdm855.dtsi"

#include "sdm855-qupv3.dtsi"