Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ad8629ae authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
Browse files

Merge "msm: kgsl: Avoid accessing GMU register if GMU is not enabled"

parents b56f6171 6a01b8a7

drivers/gpu/msm/adreno_a6xx.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -673,7 +673,7 @@ static void a6xx_hwcg_set(struct adreno_device *adreno_dev, bool on) 
	 * skip GMU_GX registers for A12.

	 * skip GMU_GX registers for A12.

	 */

	 */





	if (!adreno_is_a612(adreno_dev))

	if (gmu_core_isenabled(device) && !adreno_is_a612(adreno_dev))

		gmu_core_regrmw(device,

		gmu_core_regrmw(device,

			A6XX_GPU_GMU_GX_SPTPRAC_CLOCK_CONTROL, 1, 0);

			A6XX_GPU_GMU_GX_SPTPRAC_CLOCK_CONTROL, 1, 0);
@@ -685,7 +685,7 @@ static void a6xx_hwcg_set(struct adreno_device *adreno_dev, bool on) 
	 * A612 GPU is not having the GX power domain. Hence

	 * A612 GPU is not having the GX power domain. Hence

	 * skip GMU_GX registers for A612.

	 * skip GMU_GX registers for A612.

	 */

	 */

	if (!adreno_is_a612(adreno_dev))

	if (gmu_core_isenabled(device) && !adreno_is_a612(adreno_dev))

		gmu_core_regrmw(device,

		gmu_core_regrmw(device,

			A6XX_GPU_GMU_GX_SPTPRAC_CLOCK_CONTROL, 0, 1);

			A6XX_GPU_GMU_GX_SPTPRAC_CLOCK_CONTROL, 0, 1);