Loading drivers/power/supply/qcom/qpnp-smb5.c +11 −0 Original line number Diff line number Diff line Loading @@ -1635,6 +1635,17 @@ static int smb5_configure_typec(struct smb_charger *chg) return rc; } /* Enable detection of unoriented debug accessory in source mode */ rc = smblib_masked_write(chg, DEBUG_ACCESS_SRC_CFG_REG, EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT, EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT); if (rc < 0) { dev_err(chg->dev, "Couldn't configure TYPE_C_DEBUG_ACCESS_SRC_CFG_REG rc=%d\n", rc); return rc; } rc = smblib_masked_write(chg, USBIN_LOAD_CFG_REG, USBIN_IN_COLLAPSE_GF_SEL_MASK | USBIN_AICL_STEP_TIMING_SEL_MASK, 0); Loading drivers/power/supply/qcom/smb5-reg.h +3 −0 Original line number Diff line number Diff line Loading @@ -361,6 +361,9 @@ enum { #define TYPEC_CCOUT_VALUE_BIT BIT(1) #define TYPEC_CCOUT_SRC_BIT BIT(0) #define DEBUG_ACCESS_SRC_CFG_REG (TYPEC_BASE + 0x4C) #define EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT BIT(0) #define TYPE_C_CRUDE_SENSOR_CFG_REG (TYPEC_BASE + 0x4e) #define EN_SRC_CRUDE_SENSOR_BIT BIT(1) #define EN_SNK_CRUDE_SENSOR_BIT BIT(0) Loading Loading
drivers/power/supply/qcom/qpnp-smb5.c +11 −0 Original line number Diff line number Diff line Loading @@ -1635,6 +1635,17 @@ static int smb5_configure_typec(struct smb_charger *chg) return rc; } /* Enable detection of unoriented debug accessory in source mode */ rc = smblib_masked_write(chg, DEBUG_ACCESS_SRC_CFG_REG, EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT, EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT); if (rc < 0) { dev_err(chg->dev, "Couldn't configure TYPE_C_DEBUG_ACCESS_SRC_CFG_REG rc=%d\n", rc); return rc; } rc = smblib_masked_write(chg, USBIN_LOAD_CFG_REG, USBIN_IN_COLLAPSE_GF_SEL_MASK | USBIN_AICL_STEP_TIMING_SEL_MASK, 0); Loading
drivers/power/supply/qcom/smb5-reg.h +3 −0 Original line number Diff line number Diff line Loading @@ -361,6 +361,9 @@ enum { #define TYPEC_CCOUT_VALUE_BIT BIT(1) #define TYPEC_CCOUT_SRC_BIT BIT(0) #define DEBUG_ACCESS_SRC_CFG_REG (TYPEC_BASE + 0x4C) #define EN_UNORIENTED_DEBUG_ACCESS_SRC_BIT BIT(0) #define TYPE_C_CRUDE_SENSOR_CFG_REG (TYPEC_BASE + 0x4e) #define EN_SRC_CRUDE_SENSOR_BIT BIT(1) #define EN_SNK_CRUDE_SENSOR_BIT BIT(0) Loading