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Commit a05de66e authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

Merge branch 'rcar-rst' into clk-renesas-for-v4.10 

soc: renesas: Add R-Car RST driver for obtaining mode pin state
parents dbdcc4f9 3e91d07b

Documentation/devicetree/bindings/reset/renesas,rst.txt

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DT bindings for the Renesas R-Car and RZ/G Reset Controllers



The R-Car and RZ/G Reset Controllers provide reset control, and implement the

following functions:

  - Latching of the levels on mode pins when PRESET# is negated,

  - Mode monitoring register,

  - Reset control of peripheral devices (on R-Car Gen1),

  - Watchdog timer (on R-Car Gen1),

  - Register-based reset control and boot address registers for the various CPU

    cores (on R-Car Gen2 and Gen3, and on RZ/G).





Required properties:

  - compatible: Should be

		  - "renesas,<soctype>-reset-wdt" for R-Car Gen1,

		  - "renesas,<soctype>-rst" for R-Car Gen2 and Gen3, and RZ/G

		Examples with soctypes are:

		  - "renesas,r8a7743-rst" (RZ/G1M)

		  - "renesas,r8a7745-rst" (RZ/G1E)

		  - "renesas,r8a7778-reset-wdt" (R-Car M1A)

		  - "renesas,r8a7779-reset-wdt" (R-Car H1)

		  - "renesas,r8a7790-rst" (R-Car H2)

		  - "renesas,r8a7791-rst" (R-Car M2-W)

		  - "renesas,r8a7792-rst" (R-Car V2H

		  - "renesas,r8a7793-rst" (R-Car M2-N)

		  - "renesas,r8a7794-rst" (R-Car E2)

		  - "renesas,r8a7795-rst" (R-Car H3)

		  - "renesas,r8a7796-rst" (R-Car M3-W)

  - reg: Address start and address range for the device.





Example:



	rst: reset-controller@e6160000 {

		compatible = "renesas,r8a7795-rst";

		reg = <0 0xe6160000 0 0x0200>;

	};

arch/arm/boot/dts/r8a7778.dtsi

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@@ -626,4 +626,9 @@ 
				"sru-src6", "sru-src7", "sru-src8";

		};

	};



	rst: reset-controller@ffcc0000 {

		compatible = "renesas,r8a7778-reset-wdt";

		reg = <0xffcc0000 0x40>;

	};

};

arch/arm/boot/dts/r8a7779.dtsi

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@@ -590,6 +590,11 @@ 
		};

	};



	rst: reset-controller@ffcc0000 {

		compatible = "renesas,r8a7779-reset-wdt";

		reg = <0xffcc0000 0x48>;

	};



	sysc: system-controller@ffd85000 {

		compatible = "renesas,r8a7779-sysc";

		reg = <0xffd85000 0x0200>;

arch/arm/boot/dts/r8a7790.dtsi

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@@ -1471,6 +1471,11 @@ 
		};

	};



	rst: reset-controller@e6160000 {

		compatible = "renesas,r8a7790-rst";

		reg = <0 0xe6160000 0 0x0100>;

	};



	sysc: system-controller@e6180000 {

		compatible = "renesas,r8a7790-sysc";

		reg = <0 0xe6180000 0 0x0200>;

arch/arm/boot/dts/r8a7791.dtsi

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@@ -1482,6 +1482,11 @@ 
		};

	};



	rst: reset-controller@e6160000 {

		compatible = "renesas,r8a7791-rst";

		reg = <0 0xe6160000 0 0x0100>;

	};



	sysc: system-controller@e6180000 {

		compatible = "renesas,r8a7791-sysc";

		reg = <0 0xe6180000 0 0x0200>;