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Commit dbdcc4f9 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Geert Uytterhoeven
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clk: renesas: r8a7796: Add DU and LVDS clocks 



Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 88ddc1f8

drivers/clk/renesas/r8a7796-cpg-mssr.c

+4 −0
Original line number Diff line number Diff line
@@ -155,6 +155,10 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { 
	DEF_MOD("vspd0",		 623,	R8A7796_CLK_S0D2),

	DEF_MOD("vspb",			 626,	R8A7796_CLK_S0D1),

	DEF_MOD("vspi0",		 631,	R8A7796_CLK_S0D1),

	DEF_MOD("du2",			 722,	R8A7796_CLK_S2D1),

	DEF_MOD("du1",			 723,	R8A7796_CLK_S2D1),

	DEF_MOD("du0",			 724,	R8A7796_CLK_S2D1),

	DEF_MOD("lvds",			 727,	R8A7796_CLK_S2D1),

	DEF_MOD("etheravb",		 812,	R8A7796_CLK_S0D6),

	DEF_MOD("gpio7",		 905,	R8A7796_CLK_S3D4),

	DEF_MOD("gpio6",		 906,	R8A7796_CLK_S3D4),