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Commit 9dc85f6c authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add energy costs for trinket"

parents 826698fb 8d64e0c4

arch/arm64/boot/dts/qcom/trinket.dtsi

+84 −0
Original line number Diff line number Diff line
@@ -41,6 +41,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x0>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;

			next-level-cache = <&L2_0>;

			L2_0: l2-cache {

			      compatible = "arm,arch-cache";
@@ -66,6 +68,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x1>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;

			next-level-cache = <&L2_0>;



			L1_I_1: l1-icache {
@@ -88,6 +92,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x2>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;

			next-level-cache = <&L2_0>;



			L1_I_2: l1-icache {
@@ -110,6 +116,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x3>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;

			next-level-cache = <&L2_0>;



			L1_I_3: l1-icache {
@@ -132,6 +140,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x100>;

			enable-method = "psci";

			capacity-dmips-mhz = <1638>;

			sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>;

			next-level-cache = <&L2_1>;

			L2_1: l2-cache {

			      compatible = "arm,arch-cache";
@@ -158,6 +168,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x101>;

			enable-method = "psci";

			capacity-dmips-mhz = <1638>;

			sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>;

			next-level-cache = <&L2_1>;



			L1_I_101: l1-icache {
@@ -180,6 +192,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x102>;

			enable-method = "psci";

			capacity-dmips-mhz = <1638>;

			sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>;

			next-level-cache = <&L2_1>;



			L1_I_102: l1-icache {
@@ -202,6 +216,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x103>;

			enable-method = "psci";

			capacity-dmips-mhz = <1638>;

			sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>;

			next-level-cache = <&L2_1>;



			L1_I_103: l1-icache {
@@ -258,6 +274,74 @@ 
		};

	};



	energy_costs: energy-costs {

		compatible = "sched-energy";



		CPU_COST_0: core-cost0 {

			busy-cost-data = <

				300000	12

				614400	22

				864000	39

				1017600	54

				1305600	83

				1420800	102

				1612800	130

				1804800	172

			>;

			idle-cost-data = <

				10 8 6 4

			>;

		};



		CPU_COST_1: core-cost1 {

			busy-cost-data = <

				300000	211

				652800	417

				902400	722

				1056000	991

				1401600	1577

				1536000	1932

				1804800	2579

				2016000	3391

			>;

			idle-cost-data = <

				100 60 40 20

			>;

		};



		CLUSTER_COST_0: cluster-cost0 {

			busy-cost-data = <

				300000	5

				614400	8

				864000	9

				1017600	12

				1305600	18

				1420800	21

				1612800	27

				1804800	36

			>;

			idle-cost-data = <

				4 3 2 1

			>;

		};



		CLUSTER_COST_1: cluster-cost1 {

			busy-cost-data = <

				300000	38

				652800	46

				902400	52

				1056000	68

				1401600	88

				1536000	100

				1804800	108

				2016000	120

			>;

			idle-cost-data = <

				4 3 2 1

			>;

		};

	};



	psci {

		compatible = "arm,psci-1.0";

		method = "smc";