Loading drivers/gpu/msm/adreno.h +1 −1 Original line number Diff line number Diff line Loading @@ -1024,7 +1024,7 @@ struct adreno_gpudev { void (*gpu_keepalive)(struct adreno_device *adreno_dev, bool state); bool (*hw_isidle)(struct adreno_device *); const char *(*iommu_fault_block)(struct adreno_device *adreno_dev, const char *(*iommu_fault_block)(struct kgsl_device *device, unsigned int fsynr1); int (*reset)(struct kgsl_device *, int fault); int (*soft_reset)(struct adreno_device *); Loading drivers/gpu/msm/adreno_a6xx.c +33 −21 Original line number Diff line number Diff line Loading @@ -1678,10 +1678,10 @@ static void a6xx_llc_enable_overrides(struct adreno_device *adreno_dev) A6XX_GPU_CX_MISC_SYSTEM_CACHE_CNTL_0, 0x3); } static const char *fault_block[8] = { static const char * const fault_block[] = { [0] = "CP", [1] = "UCHE", [2] = "VFD", [2] = "UCHE", [3] = "UCHE", [4] = "CCU", [5] = "unknown", Loading @@ -1689,36 +1689,48 @@ static const char *fault_block[8] = { [7] = "GPMU", }; static const char *uche_client[8] = { [0] = "VFD", [1] = "SP", [2] = "VSC", [3] = "VPC", [4] = "HLSQ", [5] = "PC", [6] = "LRZ", [7] = "unknown", static const char *uche_client[7][3] = { {"SP | VSC | VPC | HLSQ | PC | LRZ", "TP", "VFD"}, {"VSC | VPC | HLSQ | PC | LRZ", "TP | VFD", "SP"}, {"SP | VPC | HLSQ | PC | LRZ", "TP | VFD", "VSC"}, {"SP | VSC | HLSQ | PC | LRZ", "TP | VFD", "VPC"}, {"SP | VSC | VPC | PC | LRZ", "TP | VFD", "HLSQ"}, {"SP | VSC | VPC | HLSQ | LRZ", "TP | VFD", "PC"}, {"SP | VSC | VPC | HLSQ | PC", "TP | VFD", "LRZ"}, }; static const char *a6xx_iommu_fault_block(struct adreno_device *adreno_dev, static const char *a6xx_iommu_fault_block(struct kgsl_device *device, unsigned int fsynr1) { struct kgsl_device *device = KGSL_DEVICE(adreno_dev); unsigned int client_id; unsigned int uche_client_id; unsigned int mid, uche_client_id = 0x5c00bd00; static char str[40]; client_id = fsynr1 & 0xff; mid = fsynr1 & 0xff; if (client_id >= ARRAY_SIZE(fault_block)) if (mid >= ARRAY_SIZE(fault_block)) return "unknown"; else if (client_id != 3) return fault_block[client_id]; /* Return the fault block except for UCHE */ else if (!mid || (mid > 3)) return fault_block[mid]; mutex_lock(&device->mutex); if (!kgsl_state_is_awake(device)) { mutex_unlock(&device->mutex); return "UCHE: unknown"; } kgsl_regread(device, A6XX_UCHE_CLIENT_PF, &uche_client_id); mutex_unlock(&device->mutex); return uche_client[uche_client_id & A6XX_UCHE_CLIENT_PF_CLIENT_ID_MASK]; /* Ignore the value if the gpu is in IFPC */ if (uche_client_id == 0x5c00bd00) return "UCHE: unknown"; uche_client_id &= A6XX_UCHE_CLIENT_PF_CLIENT_ID_MASK; snprintf(str, sizeof(str), "UCHE: %s", uche_client[uche_client_id][mid - 1]); return str; } static void a6xx_cp_callback(struct adreno_device *adreno_dev, int bit) Loading drivers/gpu/msm/kgsl_iommu.c +1 −2 Original line number Diff line number Diff line Loading @@ -883,8 +883,7 @@ static int kgsl_iommu_fault_handler(struct iommu_domain *domain, fsynr1 = KGSL_IOMMU_GET_CTX_REG(ctx, FSYNR1); KGSL_MEM_CRIT(ctx->kgsldev, "FAULTING BLOCK: %s\n", gpudev->iommu_fault_block(adreno_dev, fsynr1)); gpudev->iommu_fault_block(device, fsynr1)); } /* Don't print the debug if this is a permissions fault */ Loading Loading
drivers/gpu/msm/adreno.h +1 −1 Original line number Diff line number Diff line Loading @@ -1024,7 +1024,7 @@ struct adreno_gpudev { void (*gpu_keepalive)(struct adreno_device *adreno_dev, bool state); bool (*hw_isidle)(struct adreno_device *); const char *(*iommu_fault_block)(struct adreno_device *adreno_dev, const char *(*iommu_fault_block)(struct kgsl_device *device, unsigned int fsynr1); int (*reset)(struct kgsl_device *, int fault); int (*soft_reset)(struct adreno_device *); Loading
drivers/gpu/msm/adreno_a6xx.c +33 −21 Original line number Diff line number Diff line Loading @@ -1678,10 +1678,10 @@ static void a6xx_llc_enable_overrides(struct adreno_device *adreno_dev) A6XX_GPU_CX_MISC_SYSTEM_CACHE_CNTL_0, 0x3); } static const char *fault_block[8] = { static const char * const fault_block[] = { [0] = "CP", [1] = "UCHE", [2] = "VFD", [2] = "UCHE", [3] = "UCHE", [4] = "CCU", [5] = "unknown", Loading @@ -1689,36 +1689,48 @@ static const char *fault_block[8] = { [7] = "GPMU", }; static const char *uche_client[8] = { [0] = "VFD", [1] = "SP", [2] = "VSC", [3] = "VPC", [4] = "HLSQ", [5] = "PC", [6] = "LRZ", [7] = "unknown", static const char *uche_client[7][3] = { {"SP | VSC | VPC | HLSQ | PC | LRZ", "TP", "VFD"}, {"VSC | VPC | HLSQ | PC | LRZ", "TP | VFD", "SP"}, {"SP | VPC | HLSQ | PC | LRZ", "TP | VFD", "VSC"}, {"SP | VSC | HLSQ | PC | LRZ", "TP | VFD", "VPC"}, {"SP | VSC | VPC | PC | LRZ", "TP | VFD", "HLSQ"}, {"SP | VSC | VPC | HLSQ | LRZ", "TP | VFD", "PC"}, {"SP | VSC | VPC | HLSQ | PC", "TP | VFD", "LRZ"}, }; static const char *a6xx_iommu_fault_block(struct adreno_device *adreno_dev, static const char *a6xx_iommu_fault_block(struct kgsl_device *device, unsigned int fsynr1) { struct kgsl_device *device = KGSL_DEVICE(adreno_dev); unsigned int client_id; unsigned int uche_client_id; unsigned int mid, uche_client_id = 0x5c00bd00; static char str[40]; client_id = fsynr1 & 0xff; mid = fsynr1 & 0xff; if (client_id >= ARRAY_SIZE(fault_block)) if (mid >= ARRAY_SIZE(fault_block)) return "unknown"; else if (client_id != 3) return fault_block[client_id]; /* Return the fault block except for UCHE */ else if (!mid || (mid > 3)) return fault_block[mid]; mutex_lock(&device->mutex); if (!kgsl_state_is_awake(device)) { mutex_unlock(&device->mutex); return "UCHE: unknown"; } kgsl_regread(device, A6XX_UCHE_CLIENT_PF, &uche_client_id); mutex_unlock(&device->mutex); return uche_client[uche_client_id & A6XX_UCHE_CLIENT_PF_CLIENT_ID_MASK]; /* Ignore the value if the gpu is in IFPC */ if (uche_client_id == 0x5c00bd00) return "UCHE: unknown"; uche_client_id &= A6XX_UCHE_CLIENT_PF_CLIENT_ID_MASK; snprintf(str, sizeof(str), "UCHE: %s", uche_client[uche_client_id][mid - 1]); return str; } static void a6xx_cp_callback(struct adreno_device *adreno_dev, int bit) Loading
drivers/gpu/msm/kgsl_iommu.c +1 −2 Original line number Diff line number Diff line Loading @@ -883,8 +883,7 @@ static int kgsl_iommu_fault_handler(struct iommu_domain *domain, fsynr1 = KGSL_IOMMU_GET_CTX_REG(ctx, FSYNR1); KGSL_MEM_CRIT(ctx->kgsldev, "FAULTING BLOCK: %s\n", gpudev->iommu_fault_block(adreno_dev, fsynr1)); gpudev->iommu_fault_block(device, fsynr1)); } /* Don't print the debug if this is a permissions fault */ Loading