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Commit 98622d4b authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: add 7nm dp phy pll node on SDM855"

parents 2744be73 f71c5adf

arch/arm64/boot/dts/qcom/sdm855-sde-pll.dtsi

+4 −3
Original line number Original line Diff line number Diff line
@@ -66,7 +66,7 @@ 
	};

	};





	mdss_dp_pll: qcom,mdss_dp_pll@c011000 {

	mdss_dp_pll: qcom,mdss_dp_pll@c011000 {

		compatible = "qcom,mdss_dp_pll_10nm";

		compatible = "qcom,mdss_dp_pll_7nm";

		label = "MDSS DP PLL";

		label = "MDSS DP PLL";

		cell-index = <0>;

		cell-index = <0>;

		#clock-cells = <1>;

		#clock-cells = <1>;
@@ -83,10 +83,11 @@ 




		clocks = <&clock_dispcc DISP_CC_MDSS_AHB_CLK>,

		clocks = <&clock_dispcc DISP_CC_MDSS_AHB_CLK>,

			 <&clock_rpmh RPMH_CXO_CLK>,

			 <&clock_rpmh RPMH_CXO_CLK>,

			 <&clock_gcc GCC_DISP_AHB_CLK>,

			 <&clock_gcc GCC_USB3_PRIM_CLKREF_CLK>,

			 <&clock_gcc GCC_USB3_PRIM_CLKREF_CLK>,

			 <&clock_gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;

			 <&clock_gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;

		clock-names = "iface_clk", "ref_clk_src", "ref_clk",

		clock-names = "iface_clk", "ref_clk_src", "gcc_iface",

			"pipe_clk";

			"ref_clk", "pipe_clk";

		clock-rate = <0>;

		clock-rate = <0>;





		qcom,platform-supply-entries {

		qcom,platform-supply-entries {