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Commit 93b81f51 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin Committed by Daniel Vetter
Browse files

drm/i915: Add tiled framebuffer modifiers 



To be used from the new addfb2 extension.

v2:
- Drop Intel-specific untiled modfier.
- Move to drm_fourcc.h.
- Document layouts a bit and denote them as platform-specific and not
  useable for cross-driver sharing.
- Add Y-tiling for completeness.
- Drop special docstring markers to avoid confusing kerneldoc.

v3: Give Y-tiling a unique idea, noticed by Tvrtko.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> (v1)
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 35cb6f3b

drivers/gpu/drm/i915/i915_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 
#define _I915_DRV_H_



#include <uapi/drm/i915_drm.h>

#include <uapi/drm/drm_fourcc.h>



#include "i915_reg.h"

#include "intel_bios.h"

include/uapi/drm/drm_fourcc.h

+31 −0
Original line number Diff line number Diff line
@@ -164,4 +164,35 @@ 
 * authoritative source for all of these.

 */



/* Intel framebuffer modifiers */



/*

 * Intel X-tiling layout

 *

 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)

 * in row-major layout. Within the tile bytes are laid out row-major, with

 * a platform-dependent stride. On top of that the memory can apply

 * platform-depending swizzling of some higher address bits into bit6.

 *

 * This format is highly platforms specific and not useful for cross-driver

 * sharing. It exists since on a given platform it does uniquely identify the

 * layout in a simple way for i915-specific userspace.

 */

#define I915_FORMAT_MOD_X_TILED	fourcc_mod_code(INTEL, 1)



/*

 * Intel Y-tiling layout

 *

 * This is a tiled layout using 4Kb tiles (except on gen2 where the tiles 2Kb)

 * in row-major layout. Within the tile bytes are laid out in OWORD (16 bytes)

 * chunks column-major, with a platform-dependent height. On top of that the

 * memory can apply platform-depending swizzling of some higher address bits

 * into bit6.

 *

 * This format is highly platforms specific and not useful for cross-driver

 * sharing. It exists since on a given platform it does uniquely identify the

 * layout in a simple way for i915-specific userspace.

 */

#define I915_FORMAT_MOD_Y_TILED	fourcc_mod_code(INTEL, 2)



#endif /* DRM_FOURCC_H */