Loading Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb-debug.txt +15 −0 Original line number Diff line number Diff line Loading @@ -35,6 +35,19 @@ Supported Properties: the corresponding addresses are specified in the reg property. - clocks Usage: optional Value type: <prop-encoded-array> Definition: Clock tuple consisting of a phandle to a clock controller device and the clock ID number for the SPMI debug controller clock. - clock-names Usage: required if clocks property is specified Value type: <string> Definition: Defines the name of the clock defined in the "clocks" property. This must be "core_clk". - #address-cells Usage: required Value type: <u32> Loading @@ -57,6 +70,8 @@ qcom,spmi-debug@6b22000 { compatible = "qcom,spmi-pmic-arb-debug"; reg = <0x6b22000 0x60>, <0x7820A8 4>; reg-names = "core", "fuse"; clocks = <&clock_aop QDSS_CLK>; clock-names = "core_clk"; qcom,fuse-disable-bit = <12>; #address-cells = <2>; #size-cells = <0>; Loading drivers/spmi/spmi-pmic-arb-debug.c +27 −0 Original line number Diff line number Diff line Loading @@ -11,6 +11,7 @@ * GNU General Public License for more details. */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/io.h> Loading Loading @@ -69,6 +70,7 @@ enum pmic_arb_cmd_op_code { struct spmi_pmic_arb_debug { void __iomem *addr; raw_spinlock_t lock; struct clk *clock; }; static inline void pmic_arb_debug_write(struct spmi_pmic_arb_debug *pa, Loading Loading @@ -181,6 +183,12 @@ static int pmic_arb_debug_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, else return -EINVAL; rc = clk_prepare_enable(pa->clock); if (rc) { pr_err("%s: failed to enable core clock, rc=%d\n", __func__, rc); return rc; } raw_spin_lock_irqsave(&pa->lock, flags); rc = pmic_arb_debug_issue_command(ctrl, opc, sid, addr, len); Loading @@ -192,6 +200,7 @@ static int pmic_arb_debug_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, buf[i] = pmic_arb_debug_read(pa, PMIC_ARB_DEBUG_RDATA(i)); done: raw_spin_unlock_irqrestore(&pa->lock, flags); clk_disable_unprepare(pa->clock); return rc; } Loading Loading @@ -221,6 +230,12 @@ static int pmic_arb_debug_write_cmd(struct spmi_controller *ctrl, u8 opc, else return -EINVAL; rc = clk_prepare_enable(pa->clock); if (rc) { pr_err("%s: failed to enable core clock, rc=%d\n", __func__, rc); return rc; } raw_spin_lock_irqsave(&pa->lock, flags); /* Write data to FIFO */ Loading @@ -230,6 +245,7 @@ static int pmic_arb_debug_write_cmd(struct spmi_controller *ctrl, u8 opc, rc = pmic_arb_debug_issue_command(ctrl, opc, sid, addr, len); raw_spin_unlock_irqrestore(&pa->lock, flags); clk_disable_unprepare(pa->clock); return rc; } Loading Loading @@ -293,6 +309,17 @@ static int spmi_pmic_arb_debug_probe(struct platform_device *pdev) goto err_put_ctrl; } if (of_find_property(pdev->dev.of_node, "clock-names", NULL)) { pa->clock = devm_clk_get(&pdev->dev, "core_clk"); if (IS_ERR(pa->clock)) { rc = PTR_ERR(pa->clock); if (rc != -EPROBE_DEFER) dev_err(&pdev->dev, "unable to request core clock, rc=%d\n", rc); goto err_put_ctrl; } } platform_set_drvdata(pdev, ctrl); raw_spin_lock_init(&pa->lock); Loading Loading
Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb-debug.txt +15 −0 Original line number Diff line number Diff line Loading @@ -35,6 +35,19 @@ Supported Properties: the corresponding addresses are specified in the reg property. - clocks Usage: optional Value type: <prop-encoded-array> Definition: Clock tuple consisting of a phandle to a clock controller device and the clock ID number for the SPMI debug controller clock. - clock-names Usage: required if clocks property is specified Value type: <string> Definition: Defines the name of the clock defined in the "clocks" property. This must be "core_clk". - #address-cells Usage: required Value type: <u32> Loading @@ -57,6 +70,8 @@ qcom,spmi-debug@6b22000 { compatible = "qcom,spmi-pmic-arb-debug"; reg = <0x6b22000 0x60>, <0x7820A8 4>; reg-names = "core", "fuse"; clocks = <&clock_aop QDSS_CLK>; clock-names = "core_clk"; qcom,fuse-disable-bit = <12>; #address-cells = <2>; #size-cells = <0>; Loading
drivers/spmi/spmi-pmic-arb-debug.c +27 −0 Original line number Diff line number Diff line Loading @@ -11,6 +11,7 @@ * GNU General Public License for more details. */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/io.h> Loading Loading @@ -69,6 +70,7 @@ enum pmic_arb_cmd_op_code { struct spmi_pmic_arb_debug { void __iomem *addr; raw_spinlock_t lock; struct clk *clock; }; static inline void pmic_arb_debug_write(struct spmi_pmic_arb_debug *pa, Loading Loading @@ -181,6 +183,12 @@ static int pmic_arb_debug_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, else return -EINVAL; rc = clk_prepare_enable(pa->clock); if (rc) { pr_err("%s: failed to enable core clock, rc=%d\n", __func__, rc); return rc; } raw_spin_lock_irqsave(&pa->lock, flags); rc = pmic_arb_debug_issue_command(ctrl, opc, sid, addr, len); Loading @@ -192,6 +200,7 @@ static int pmic_arb_debug_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, buf[i] = pmic_arb_debug_read(pa, PMIC_ARB_DEBUG_RDATA(i)); done: raw_spin_unlock_irqrestore(&pa->lock, flags); clk_disable_unprepare(pa->clock); return rc; } Loading Loading @@ -221,6 +230,12 @@ static int pmic_arb_debug_write_cmd(struct spmi_controller *ctrl, u8 opc, else return -EINVAL; rc = clk_prepare_enable(pa->clock); if (rc) { pr_err("%s: failed to enable core clock, rc=%d\n", __func__, rc); return rc; } raw_spin_lock_irqsave(&pa->lock, flags); /* Write data to FIFO */ Loading @@ -230,6 +245,7 @@ static int pmic_arb_debug_write_cmd(struct spmi_controller *ctrl, u8 opc, rc = pmic_arb_debug_issue_command(ctrl, opc, sid, addr, len); raw_spin_unlock_irqrestore(&pa->lock, flags); clk_disable_unprepare(pa->clock); return rc; } Loading Loading @@ -293,6 +309,17 @@ static int spmi_pmic_arb_debug_probe(struct platform_device *pdev) goto err_put_ctrl; } if (of_find_property(pdev->dev.of_node, "clock-names", NULL)) { pa->clock = devm_clk_get(&pdev->dev, "core_clk"); if (IS_ERR(pa->clock)) { rc = PTR_ERR(pa->clock); if (rc != -EPROBE_DEFER) dev_err(&pdev->dev, "unable to request core clock, rc=%d\n", rc); goto err_put_ctrl; } } platform_set_drvdata(pdev, ctrl); raw_spin_lock_init(&pa->lock); Loading