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Commit 92aa9509 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: remove unused gpu DT tree node for a640v2"

parents 34c3f483 2f573210
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+37 −0
Original line number Diff line number Diff line
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

&soc {
	gpu_opp_table_v2: gpu_opp_table_v2 {
		compatible = "operating-points-v2";

		opp-585000000 {
			opp-hz = /bits/ 64 <585000000>;
			opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM>;
		};

		opp-427000000 {
			opp-hz = /bits/ 64 <427000000>;
			opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS_L1>;
		};

		opp-345000000 {
			opp-hz = /bits/ 64 <345000000>;
			opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS>;
		};

		opp-257000000 {
			opp-hz = /bits/ 64 <257000000>;
			opp-microvolt = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
		};
	};
};
+13 −54
Original line number Diff line number Diff line
@@ -552,39 +552,8 @@
		>;
	};
};
&gpu_opp_table {
	compatible = "operating-points-v2";

	opp-700000000 {
		opp-hz = /bits/ 64 <585000000>;
		opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM>;
	};

	opp-675000000 {
		opp-hz = /bits/ 64 <585000000>;
		opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM>;
	};

	opp-585000000 {
		opp-hz = /bits/ 64 <585000000>;
		opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM>;
	};

	opp-427000000 {
		opp-hz = /bits/ 64 <427000000>;
		opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS_L1>;
	};

	opp-345000000 {
		opp-hz = /bits/ 64 <345000000>;
		opp-microvolt = <RPMH_REGULATOR_LEVEL_SVS>;
	};

	opp-257000000 {
		opp-hz = /bits/ 64 <257000000>;
		opp-microvolt = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
	};
};
#include "sm8150-gpu-v2.dtsi"

/* GPU overrides */
&msm_gpu {
@@ -614,6 +583,10 @@
		<26 512 0 7211000>,    // 10 bus=1804
		<26 512 0 8363000>;    // 11 bus=2092

	qcom,initial-pwrlevel = <3>;

	operating-points-v2 = <&gpu_opp_table_v2>;

	qcom,gpu-pwrlevels {
		#address-cells = <1>;
		#size-cells = <0>;
@@ -630,51 +603,37 @@

		qcom,gpu-pwrlevel@1 {
			reg = <1>;
			qcom,gpu-freq = <585000000>;
			qcom,bus-freq = <7>;
			qcom,bus-min = <6>;
			qcom,bus-max = <11>;
		};

		qcom,gpu-pwrlevel@2 {
			reg = <2>;
			qcom,gpu-freq = <585000000>;
			qcom,bus-freq = <7>;
			qcom,bus-min = <6>;
			qcom,bus-max = <11>;
		};

		qcom,gpu-pwrlevel@3 {
			reg = <3>;
			qcom,gpu-freq = <427000000>;
			qcom,bus-freq = <6>;
			qcom,bus-min = <5>;
			qcom,bus-max = <9>;
		};

		qcom,gpu-pwrlevel@4 {
			reg = <4>;
		qcom,gpu-pwrlevel@2 {
			reg = <2>;
			qcom,gpu-freq = <345000000>;
			qcom,bus-freq = <3>;
			qcom,bus-min = <3>;
			qcom,bus-max = <8>;
		};

		qcom,gpu-pwrlevel@5 {
			reg = <5>;
		qcom,gpu-pwrlevel@3 {
			reg = <3>;
			qcom,gpu-freq = <257000000>;
			qcom,bus-freq = <2>;
			qcom,bus-min = <1>;
			qcom,bus-max = <8>;
		};

		qcom,gpu-pwrlevel@6 {
			reg = <6>;
		qcom,gpu-pwrlevel@4 {
			reg = <4>;
			qcom,gpu-freq = <0>;
			qcom,bus-freq = <0>;
			qcom,bus-min = <0>;
			qcom,bus-max = <0>;
		};
		/delete-node/ qcom,gpu-pwrlevel@5;
		/delete-node/ qcom,gpu-pwrlevel@6;
	};

	qcom,l3-pwrlevels {