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Commit 81ad066a authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "mhi: controller: qcom: read memory carveout address from device tree"

parents 874ccf04 5502f90e

Documentation/devicetree/bindings/bus/mhi.txt

+14 −0
Original line number Diff line number Diff line
@@ -51,6 +51,20 @@ Main node properties: 
	feature for time synchronization between host processor and

	external modem.



- mhi,use-bb

  Usage: optional

  Value type: <bool>

  Definition: Set true, if PCIe controller does not have full access to host

	DDR, and we're using a dedicated memory pool like cma, or

	carveout pool. Pool must support atomic allocation.



- mhi,buffer-len

  Usage: optional

  Value type: <bool>

  Definition: MHI automatically pre-allocate buffers for some channel.

	Set the length of buffer size to allocate. If not default

	size MHI_MAX_MTU will be used.



============================

mhi channel node properties:

============================

Documentation/devicetree/bindings/bus/mhi_qcom.txt

+24 −37
Original line number Diff line number Diff line
@@ -9,31 +9,11 @@ Node Structure 


Main node properties:



- compatible

- reg

  Usage: required

  Value type: <string>

  Definition: "qcom,mhi"



- qcom,pci-dev-id

  Usage: optional

  Value type: <u32>

  Definition: PCIe device id of external modem to bind. If not set, any

	device is compatible with this node.



- qcom,pci-domain

  Usage: required

  Value type: <u32>

  Definition: PCIe root complex external modem connected to



- qcom,pci-bus

  Usage: required

  Value type: <u32>

  Definition: PCIe bus external modem connected to



- qcom,pci-slot

  Usage: required

  Value type: <u32>

  Definition: PCIe slot as assigned by pci framework to external modem

  Value type: Array (5-cell PCI resource) of <u32>

  Definition: First cell is devfn, which is determined by pci bus topology.

	Assign the other cells 0 since they are not used.



- qcom,smmu-cfg

  Usage: required
@@ -94,11 +74,15 @@ Main node properties: 
========

Example:

========



/* pcie domain (root complex) modem connected to */

&pcie1 {

	/* pcie bus modem connected to */

	pci,bus@1 {

		reg = <0 0 0 0 0>;



		qcom,mhi {

	compatible = "qcom,mhi";

	qcom,pci-domain = <0>;

	qcom,pci-bus = <1>;

	qcom,pci-slot = <0>;

			reg = <0 0 0 0 0>;

			qcom,smmu-cfg = <0x3d>;

			qcom,addr-win = <0x0 0x20000000 0x0 0x3fffffff>;

			qcom,msm-bus,name = "mhi";
@@ -106,5 +90,8 @@ qcom,mhi { 
			qcom,msm-bus,num-paths = <1>;

			qcom,msm-bus,vectors-KBps = <45 512 0 0>,

				<45 512 1200000000 650000000>;



			<mhi bus configurations>

		};

	};

};

arch/arm64/boot/dts/qcom/sm8150-cdp.dtsi

+0 −1
Original line number Diff line number Diff line
@@ -454,7 +454,6 @@ 


&mhi_0 {

	mhi,fw-name = "debug.mbn";

	status = "okay";

};



&pm8150b_adc_tm {

arch/arm64/boot/dts/qcom/sm8150-mhi.dtsi

+403 −402
Original line number Diff line number Diff line
@@ -11,13 +11,14 @@ 
 * GNU General Public License for more details.

 */



&soc {

	mhi_0: qcom,mhi {

&pcie1 {

	pci,bus@1 {

		reg = <0 0 0 0 0>;



		mhi_0: qcom,mhi@0 {

			reg = <0 0 0 0 0 >;



			/* controller specific configuration */

		compatible = "qcom,mhi";

		qcom,pci-domain = <1>;

		qcom,pci-bus = <1>;

		qcom,pci-slot = <0>;

			qcom,smmu-cfg = <0x3>;

			qcom,msm-bus,name = "mhi";

			qcom,msm-bus,num-cases = <2>;
@@ -29,7 +30,6 @@ 
			/* mhi bus specific settings */

			mhi,max-channels = <106>;

			mhi,timeout = <2000>;

		status = "disabled";



			#address-cells = <1>;

			#size-cells = <0>;
@@ -416,3 +416,4 @@ 
			};

		};

	};

};

arch/arm64/boot/dts/qcom/sm8150-mtp.dtsi

+0 −1
Original line number Diff line number Diff line
@@ -455,7 +455,6 @@ 


&mhi_0 {

	mhi,fw-name = "debug.mbn";

	status = "okay";

};



&pm8150b_adc_tm {