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Commit 5502f90e authored by Sujeev Dias's avatar Sujeev Dias Committed by Gerrit - the friendly Code Review server
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mhi: controller: qcom: read memory carveout address from device tree 



If bounce buffer is used, then MHI uses a dedicated memory range
for data transfer. Read the address from device tree and assign
to MHI controller.

CRs-Fixed: 2253996
Change-Id: I1d1f61bdbc40de0b39f8c7775c4da7c73cf14505
Signed-off-by: default avatarSujeev Dias <sdias@codeaurora.org>
parent 54cb6f8f

drivers/bus/mhi/controllers/mhi_qcom.c

+10 −4
Original line number Diff line number Diff line
@@ -345,6 +345,7 @@ static struct mhi_controller *mhi_register_controller(struct pci_dev *pci_dev) 
	struct mhi_controller *mhi_cntrl;

	struct mhi_dev *mhi_dev;

	struct device_node *of_node = pci_dev->dev.of_node;

	bool use_bb;

	u64 addr_win[2];

	int ret;
@@ -367,9 +368,14 @@ static struct mhi_controller *mhi_register_controller(struct pci_dev *pci_dev) 
	if (ret)

		goto error_register;



	/* if s1 translation enabled pull iova addr from dt */

	if (mhi_dev->smmu_cfg & MHI_SMMU_ATTACH &&

	    !(mhi_dev->smmu_cfg & MHI_SMMU_S1_BYPASS)) {

	use_bb = of_property_read_bool(of_node, "mhi,use-bb");



	/*

	 * if s1 translation enabled or using bounce buffer pull iova addr

	 * from dt

	 */

	if (use_bb || (mhi_dev->smmu_cfg & MHI_SMMU_ATTACH &&

		       !(mhi_dev->smmu_cfg & MHI_SMMU_S1_BYPASS))) {

		ret = of_property_count_elems_of_size(of_node, "qcom,addr-win",

						      sizeof(addr_win));

		if (ret != 1)
@@ -387,7 +393,7 @@ static struct mhi_controller *mhi_register_controller(struct pci_dev *pci_dev) 
	mhi_dev->iova_stop = addr_win[1];



	/*

	 * if S1 is enabled, set MHI_CTRL start address to 0 so we can use low

	 * If S1 is enabled, set MHI_CTRL start address to 0 so we can use low

	 * level mapping api to map buffers outside of smmu domain

	 */

	if (mhi_dev->smmu_cfg & MHI_SMMU_ATTACH &&