Loading arch/ia64/kernel/mca_drv.c +2 −1 Original line number Original line Diff line number Diff line Loading @@ -88,7 +88,7 @@ mca_page_isolate(unsigned long paddr) if (!ia64_phys_addr_valid(paddr)) if (!ia64_phys_addr_valid(paddr)) return ISOLATE_NONE; return ISOLATE_NONE; if (!pfn_valid(paddr)) if (!pfn_valid(paddr >> PAGE_SHIFT)) return ISOLATE_NONE; return ISOLATE_NONE; /* convert physical address to physical page number */ /* convert physical address to physical page number */ Loading @@ -108,6 +108,7 @@ mca_page_isolate(unsigned long paddr) return ISOLATE_NG; return ISOLATE_NG; /* add attribute 'Reserved' and register the page */ /* add attribute 'Reserved' and register the page */ get_page(p); SetPageReserved(p); SetPageReserved(p); page_isolate[num_page_isolate++] = p; page_isolate[num_page_isolate++] = p; Loading arch/ia64/sn/pci/pcibr/pcibr_provider.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -212,13 +212,13 @@ void pcibr_target_interrupt(struct sn_irq_info *sn_irq_info) pdi_pcibus_info; pdi_pcibus_info; /* Disable the device's IRQ */ /* Disable the device's IRQ */ pcireg_intr_enable_bit_clr(pcibus_info, bit); pcireg_intr_enable_bit_clr(pcibus_info, (1 << bit)); /* Change the device's IRQ */ /* Change the device's IRQ */ pcireg_intr_addr_addr_set(pcibus_info, bit, xtalk_addr); pcireg_intr_addr_addr_set(pcibus_info, bit, xtalk_addr); /* Re-enable the device's IRQ */ /* Re-enable the device's IRQ */ pcireg_intr_enable_bit_set(pcibus_info, bit); pcireg_intr_enable_bit_set(pcibus_info, (1 << bit)); pcibr_force_interrupt(sn_irq_info); pcibr_force_interrupt(sn_irq_info); } } Loading arch/ia64/sn/pci/pcibr/pcibr_reg.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -131,7 +131,7 @@ void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits) __sn_clrq_relaxed(&ptr->tio.cp_int_enable, bits); __sn_clrq_relaxed(&ptr->tio.cp_int_enable, bits); break; break; case PCIBR_BRIDGETYPE_PIC: case PCIBR_BRIDGETYPE_PIC: __sn_clrq_relaxed(&ptr->pic.p_int_enable, ~bits); __sn_clrq_relaxed(&ptr->pic.p_int_enable, bits); break; break; default: default: panic panic Loading Loading
arch/ia64/kernel/mca_drv.c +2 −1 Original line number Original line Diff line number Diff line Loading @@ -88,7 +88,7 @@ mca_page_isolate(unsigned long paddr) if (!ia64_phys_addr_valid(paddr)) if (!ia64_phys_addr_valid(paddr)) return ISOLATE_NONE; return ISOLATE_NONE; if (!pfn_valid(paddr)) if (!pfn_valid(paddr >> PAGE_SHIFT)) return ISOLATE_NONE; return ISOLATE_NONE; /* convert physical address to physical page number */ /* convert physical address to physical page number */ Loading @@ -108,6 +108,7 @@ mca_page_isolate(unsigned long paddr) return ISOLATE_NG; return ISOLATE_NG; /* add attribute 'Reserved' and register the page */ /* add attribute 'Reserved' and register the page */ get_page(p); SetPageReserved(p); SetPageReserved(p); page_isolate[num_page_isolate++] = p; page_isolate[num_page_isolate++] = p; Loading
arch/ia64/sn/pci/pcibr/pcibr_provider.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -212,13 +212,13 @@ void pcibr_target_interrupt(struct sn_irq_info *sn_irq_info) pdi_pcibus_info; pdi_pcibus_info; /* Disable the device's IRQ */ /* Disable the device's IRQ */ pcireg_intr_enable_bit_clr(pcibus_info, bit); pcireg_intr_enable_bit_clr(pcibus_info, (1 << bit)); /* Change the device's IRQ */ /* Change the device's IRQ */ pcireg_intr_addr_addr_set(pcibus_info, bit, xtalk_addr); pcireg_intr_addr_addr_set(pcibus_info, bit, xtalk_addr); /* Re-enable the device's IRQ */ /* Re-enable the device's IRQ */ pcireg_intr_enable_bit_set(pcibus_info, bit); pcireg_intr_enable_bit_set(pcibus_info, (1 << bit)); pcibr_force_interrupt(sn_irq_info); pcibr_force_interrupt(sn_irq_info); } } Loading
arch/ia64/sn/pci/pcibr/pcibr_reg.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -131,7 +131,7 @@ void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits) __sn_clrq_relaxed(&ptr->tio.cp_int_enable, bits); __sn_clrq_relaxed(&ptr->tio.cp_int_enable, bits); break; break; case PCIBR_BRIDGETYPE_PIC: case PCIBR_BRIDGETYPE_PIC: __sn_clrq_relaxed(&ptr->pic.p_int_enable, ~bits); __sn_clrq_relaxed(&ptr->pic.p_int_enable, bits); break; break; default: default: panic panic Loading