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Commit 7c37905e authored by Kevin Hilman's avatar Kevin Hilman
Browse files

Merge tag 'hi6620-dt-for-4.2' of git://github.com/hisilicon/linux-hisi into next/dt

ARM64: DT: Hisilicon hi6220 soc and hikey board updates for 4.2

- Added the devicetree bindings document for hi6220 SoC
- Added the devicetree bindings document for hi6220 clock
- Added dts files for hi6220 SoC and hikey board

* tag 'hi6620-dt-for-4.2' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: Add dts files for Hisilicon Hi6220 SoC
  clk: hi6220: Document devicetree bindings for hi6220 clock
  arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC
parents 36d32ed9 86e8f528
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+87 −0
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Hisilicon Platforms Device Tree Bindings
----------------------------------------------------
Hi6220 SoC
Required root node properties:
	- compatible = "hisilicon,hi6220";

Hi4511 Board
Required root node properties:
@@ -13,6 +16,9 @@ HiP01 ca9x2 Board
Required root node properties:
	- compatible = "hisilicon,hip01-ca9x2";

HiKey Board
Required root node properties:
	- compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";

Hisilicon system controller

@@ -40,6 +46,87 @@ Example:
		reboot-offset = <0x4>;
	};

-----------------------------------------------------------------------
Hisilicon Hi6220 system controller

Required properties:
- compatible : "hisilicon,hi6220-sysctrl"
- reg : Register address and size
- #clock-cells: should be set to 1, many clock registers are defined
  under this controller and this property must be present.

Hisilicon designs this controller as one of the system controllers,
its main functions are the same as Hisilicon system controller, but
the register offset of some core modules are different.

Example:
	/*for Hi6220*/
	sys_ctrl: sys_ctrl@f7030000 {
		compatible = "hisilicon,hi6220-sysctrl", "syscon";
		reg = <0x0 0xf7030000 0x0 0x2000>;
		#clock-cells = <1>;
	};


Hisilicon Hi6220 Power Always ON domain controller

Required properties:
- compatible : "hisilicon,hi6220-aoctrl"
- reg : Register address and size
- #clock-cells: should be set to 1, many clock registers are defined
  under this controller and this property must be present.

Hisilicon designs this system controller to control the power always
on domain for mobile platform.

Example:
	/*for Hi6220*/
	ao_ctrl: ao_ctrl@f7800000 {
		compatible = "hisilicon,hi6220-aoctrl", "syscon";
		reg = <0x0 0xf7800000 0x0 0x2000>;
		#clock-cells = <1>;
	};


Hisilicon Hi6220 Media domain controller

Required properties:
- compatible : "hisilicon,hi6220-mediactrl"
- reg : Register address and size
- #clock-cells: should be set to 1, many clock registers are defined
  under this controller and this property must be present.

Hisilicon designs this system controller to control the multimedia
domain(e.g. codec, G3D ...) for mobile platform.

Example:
	/*for Hi6220*/
	media_ctrl: media_ctrl@f4410000 {
		compatible = "hisilicon,hi6220-mediactrl", "syscon";
		reg = <0x0 0xf4410000 0x0 0x1000>;
		#clock-cells = <1>;
	};


Hisilicon Hi6220 Power Management domain controller

Required properties:
- compatible : "hisilicon,hi6220-pmctrl"
- reg : Register address and size
- #clock-cells: should be set to 1, some clock registers are define
  under this controller and this property must be present.

Hisilicon designs this system controller to control the power management
domain for mobile platform.

Example:
	/*for Hi6220*/
	pm_ctrl: pm_ctrl@f7032000 {
		compatible = "hisilicon,hi6220-pmctrl", "syscon";
		reg = <0x0 0xf7032000 0x0 0x1000>;
		#clock-cells = <1>;
	};

-----------------------------------------------------------------------
Hisilicon HiP01 system controller

+34 −0
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* Hisilicon Hi6220 Clock Controller

Clock control registers reside in different Hi6220 system controllers,
please refer the following document to know more about the binding rules
for these system controllers:

Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt

Required Properties:

- compatible: the compatible should be one of the following strings to
	indicate the clock controller functionality.

	- "hisilicon,hi6220-aoctrl"
	- "hisilicon,hi6220-sysctrl"
	- "hisilicon,hi6220-mediactrl"
	- "hisilicon,hi6220-pmctrl"

- reg: physical base address of the controller and length of memory mapped
  region.

- #clock-cells: should be 1.

For example:
	sys_ctrl: sys_ctrl@f7030000 {
		compatible = "hisilicon,hi6220-sysctrl", "syscon";
		reg = <0x0 0xf7030000 0x0 0x2000>;
		#clock-cells = <1>;
	};

Each clock is assigned an identifier and client nodes use this identifier
to specify the clock which they consume.

All these identifier could be found in <dt-bindings/clock/hi6220-clock.h>.
+1 −0
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@@ -4,6 +4,7 @@ dts-dirs += arm
dts-dirs += cavium
dts-dirs += exynos
dts-dirs += freescale
dts-dirs += hisilicon
dts-dirs += mediatek
dts-dirs += qcom
dts-dirs += sprd
+5 −0
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dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb

always		:= $(dtb-y)
subdir-y	:= $(dts-dirs)
clean-files	:= *.dtb
+31 −0
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/*
 * dts file for Hisilicon HiKey Development Board
 *
 * Copyright (C) 2015, Hisilicon Ltd.
 *
 */

/dts-v1/;

/*Reserved 1MB memory for MCU*/
/memreserve/ 0x05e00000 0x00100000;

#include "hi6220.dtsi"

/ {
	model = "HiKey Development Board";
	compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";

	aliases {
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x0 0x0 0x40000000>;
	};
};
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