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Commit 63187215 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nv50: move tlb flushing to a helper function



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent f56cb86f
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+1 −0
Original line number Diff line number Diff line
@@ -1039,6 +1039,7 @@ extern void nv50_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
extern int  nv50_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
extern int  nv50_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
extern void nv50_instmem_flush(struct drm_device *);
extern void nv50_vm_flush(struct drm_device *, int engine);

/* nv04_mc.c */
extern int  nv04_mc_init(struct drm_device *);
+8 −54
Original line number Diff line number Diff line
@@ -176,34 +176,10 @@ nv50_mem_vm_bind_linear(struct drm_device *dev, uint64_t virt, uint32_t size,
	}
	dev_priv->engine.instmem.flush(dev);

	nv_wr32(dev, 0x100c80, 0x00050001);
	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
		return -EBUSY;
	}

	nv_wr32(dev, 0x100c80, 0x00000001);
	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
		return -EBUSY;
	}

	nv_wr32(dev, 0x100c80, 0x00040001);
	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
		return -EBUSY;
	}

	nv_wr32(dev, 0x100c80, 0x00060001);
	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
		return -EBUSY;
	}

	nv50_vm_flush(dev, 5);
	nv50_vm_flush(dev, 0);
	nv50_vm_flush(dev, 4);
	nv50_vm_flush(dev, 6);
	return 0;
}

@@ -232,32 +208,10 @@ nv50_mem_vm_unbind(struct drm_device *dev, uint64_t virt, uint32_t size)
	}
	dev_priv->engine.instmem.flush(dev);

	nv_wr32(dev, 0x100c80, 0x00050001);
	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
		return;
	}

	nv_wr32(dev, 0x100c80, 0x00000001);
	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
		return;
	}

	nv_wr32(dev, 0x100c80, 0x00040001);
	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
		return;
	}

	nv_wr32(dev, 0x100c80, 0x00060001);
	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
	}
	nv50_vm_flush(dev, 5);
	nv50_vm_flush(dev, 0);
	nv50_vm_flush(dev, 4);
	nv50_vm_flush(dev, 6);
}

/*
+4 −30
Original line number Diff line number Diff line
@@ -118,21 +118,8 @@ nouveau_sgdma_bind(struct ttm_backend *be, struct ttm_mem_reg *mem)
	dev_priv->engine.instmem.flush(nvbe->dev);

	if (dev_priv->card_type == NV_50) {
		nv_wr32(dev, 0x100c80, 0x00050001);
		if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
			NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
			NV_ERROR(dev, "0x100c80 = 0x%08x\n",
						nv_rd32(dev, 0x100c80));
			return -EBUSY;
		}

		nv_wr32(dev, 0x100c80, 0x00000001);
		if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
			NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
			NV_ERROR(dev, "0x100c80 = 0x%08x\n",
						nv_rd32(dev, 0x100c80));
			return -EBUSY;
		}
		nv50_vm_flush(dev, 5); /* PGRAPH */
		nv50_vm_flush(dev, 0); /* PFIFO */
	}

	nvbe->bound = true;
@@ -171,21 +158,8 @@ nouveau_sgdma_unbind(struct ttm_backend *be)
	dev_priv->engine.instmem.flush(nvbe->dev);

	if (dev_priv->card_type == NV_50) {
		nv_wr32(dev, 0x100c80, 0x00050001);
		if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
			NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
			NV_ERROR(dev, "0x100c80 = 0x%08x\n",
						nv_rd32(dev, 0x100c80));
			return -EBUSY;
		}

		nv_wr32(dev, 0x100c80, 0x00000001);
		if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
			NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
			NV_ERROR(dev, "0x100c80 = 0x%08x\n",
						nv_rd32(dev, 0x100c80));
			return -EBUSY;
		}
		nv50_vm_flush(dev, 5);
		nv50_vm_flush(dev, 0);
	}

	nvbe->bound = false;
+10 −13
Original line number Diff line number Diff line
@@ -453,19 +453,8 @@ nv50_instmem_bind(struct drm_device *dev, struct nouveau_gpuobj *gpuobj)
	}
	dev_priv->engine.instmem.flush(dev);

	nv_wr32(dev, 0x100c80, 0x00040001);
	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (1)\n");
		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
		return -EBUSY;
	}

	nv_wr32(dev, 0x100c80, 0x00060001);
	if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) {
		NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n");
		NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80));
		return -EBUSY;
	}
	nv50_vm_flush(dev, 4);
	nv50_vm_flush(dev, 6);

	gpuobj->im_bound = 1;
	return 0;
@@ -502,3 +491,11 @@ nv50_instmem_flush(struct drm_device *dev)
		NV_ERROR(dev, "PRAMIN flush timeout\n");
}

void
nv50_vm_flush(struct drm_device *dev, int engine)
{
	nv_wr32(dev, 0x100c80, (engine << 16) | 1);
	if (!nv_wait(0x100c80, 0x00000001, 0x00000000))
		NV_ERROR(dev, "vm flush timeout: engine %d\n", engine);
}