Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6265ff19 authored by Andreas Herrmann's avatar Andreas Herrmann Committed by Ingo Molnar
Browse files

x86: cacheinfo: complete L2/L3 Cache and TLB associativity field definitions



See "CPUID Specification" (AMD Publication #: 25481, Rev. 2.28, April 2008)

Signed-off-by: default avatarAndreas Herrmann <andreas.herrmann3@amd.com>
Cc: Mark Langsdorf <mark.langsdorf@amd.com>
LKML-Reference: <20090409134710.GA8026@alberich.amd.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 2fad2d9b
Loading
Loading
Loading
Loading
+12 −4
Original line number Diff line number Diff line
@@ -200,10 +200,17 @@ union l3_cache {
};

static const unsigned short __cpuinitconst assocs[] = {
	[1] = 1, [2] = 2, [4] = 4, [6] = 8,
	[8] = 16, [0xa] = 32, [0xb] = 48,
	[1] = 1,
	[2] = 2,
	[4] = 4,
	[6] = 8,
	[8] = 16,
	[0xa] = 32,
	[0xb] = 48,
	[0xc] = 64,
	[0xf] = 0xffff // ??
	[0xd] = 96,
	[0xe] = 128,
	[0xf] = 0xffff /* fully associative - no way to show this currently */
};

static const unsigned char __cpuinitconst levels[] = { 1, 1, 2, 3 };
@@ -264,7 +271,8 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
	eax->split.type = types[leaf];
	eax->split.level = levels[leaf];
	if (leaf == 3)
		eax->split.num_threads_sharing = current_cpu_data.x86_max_cores - 1;
		eax->split.num_threads_sharing =
			current_cpu_data.x86_max_cores - 1;
	else
		eax->split.num_threads_sharing = 0;
	eax->split.num_cores_on_die = current_cpu_data.x86_max_cores - 1;