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Commit 2fad2d9b authored by Mark Langsdorf's avatar Mark Langsdorf Committed by Ingo Molnar
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x86/docs: add description for cache_disable sysfs interface 



Signed-off-by: default avatarMark Langsdorf <mark.langsdorf@amd.com>
Signed-off-by: default avatarAndreas Herrmann <andreas.herrmann3@amd.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
LKML-Reference: <20090409133153.GL31527@alberich.amd.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent ba518bea

Documentation/ABI/testing/sysfs-devices-cache_disable

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What:      /sys/devices/system/cpu/cpu*/cache/index*/cache_disable_X

Date:      August 2008

KernelVersion:	2.6.27

Contact:	mark.langsdorf@amd.com

Description:	These files exist in every cpu's cache index directories.

		There are currently 2 cache_disable_# files in each

		directory.  Reading from these files on a supported

		processor will return that cache disable index value

		for that processor and node.  Writing to one of these

		files will cause the specificed cache index to be disabled.



		Currently, only AMD Family 10h Processors support cache index

		disable, and only for their L3 caches.  See the BIOS and

		Kernel Developer's Guide at

		http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/31116-Public-GH-BKDG_3.20_2-4-09.pdf

		for formatting information and other details on the

		cache index disable.

Users:    joachim.deguara@amd.com