Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ba518bea authored by Mark Langsdorf's avatar Mark Langsdorf Committed by Ingo Molnar
Browse files

x86: cacheinfo: disable L3 ECC scrubbing when L3 cache index is disabled



(Use correct mask to zero out bits 24-28 by Andreas)

Signed-off-by: default avatarMark Langsdorf <mark.langsdorf@amd.com>
Signed-off-by: default avatarAndreas Herrmann <andreas.herrmann3@amd.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
LKML-Reference: <20090409132406.GK31527@alberich.amd.com>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent f8b201fc
Loading
Loading
Loading
Loading
+6 −0
Original line number Diff line number Diff line
@@ -731,6 +731,7 @@ static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
	int node = cpu_to_node(cpu);
	struct pci_dev *dev = node_to_k8_nb_misc(node);
	unsigned long val = 0;
	unsigned int scrubber = 0;

	if (!this_leaf->can_disable)
		return -EINVAL;
@@ -745,6 +746,11 @@ static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
		return -EINVAL;

	val |= 0xc0000000;

	pci_read_config_dword(dev, 0x58, &scrubber);
	scrubber &= ~0x1f000000;
	pci_write_config_dword(dev, 0x58, scrubber);

	pci_write_config_dword(dev, 0x1BC + index * 4, val & ~0x40000000);
	wbinvd();
	pci_write_config_dword(dev, 0x1BC + index * 4, val);