Loading Documentation/devicetree/bindings/display/msm/sde.txt +0 −3 Original line number Diff line number Diff line Loading @@ -101,8 +101,6 @@ Optional properties: - qcom,sde-dsc-size: A u32 value indicates the address range for each dsc. - qcom,sde-cdm-size: A u32 value indicates the address range for each cdm. - qcom,sde-pp-size: A u32 value indicates the address range for each pingpong. - qcom,sde-te-source: Array of GPIO sources indicating which pingpong TE is sourced to which panel TE gpio. - qcom,sde-wb-size: A u32 value indicates the address range for each writeback. - qcom,sde-len: A u32 entry for SDE address range. - qcom,sde-intf-max-prefetch-lines: Array of u32 values for max prefetch lines on Loading Loading @@ -537,7 +535,6 @@ Example: qcom,sde-pp-off = <0x00071000 0x00071800 0x00072000 0x00072800>; qcom,sde-pp-slave = <0x0 0x0 0x0 0x0>; qcom,sde-te-source = <0x0 0x1 0x0 0x0>; qcom,sde-cdm-off = <0x0007a200>; qcom,sde-dsc-off = <0x00081000 0x00081400>; qcom,sde-intf-max-prefetch-lines = <0x15 0x15 0x15 0x15>; Loading Documentation/devicetree/bindings/drm/msm/sde-dsi.txt +1 −0 Original line number Diff line number Diff line Loading @@ -59,6 +59,7 @@ Bus Scaling Data: Optional properties: - label: String to describe controller. - qcom,platform-te-gpio: Specifies the gpio used for TE. - qcom,panel-te-source: Specifies the source pin for Vsync from panel or WD Timer. - qcom,dsi-display-active: Current active display - qcom,dsi-ctrl: handle to dsi controller device - qcom,dsi-phy: handle to dsi phy device Loading drivers/gpu/drm/msm/dsi-staging/dsi_display.c +22 −3 Original line number Diff line number Diff line Loading @@ -42,6 +42,7 @@ #define MAX_NAME_SIZE 64 #define DSI_CLOCK_BITRATE_RADIX 10 #define MAX_TE_SOURCE_ID 2 static char dsi_display_primary[MAX_CMDLINE_PARAM_LEN]; static char dsi_display_secondary[MAX_CMDLINE_PARAM_LEN]; Loading Loading @@ -536,10 +537,12 @@ static bool dsi_display_validate_reg_read(struct dsi_panel *panel) return false; } static void dsi_display_parse_te_gpio(struct dsi_display *display) static void dsi_display_parse_te_data(struct dsi_display *display) { struct platform_device *pdev; struct device *dev; int rc = 0; u32 val = 0; pdev = display->pdev; if (!pdev) { Loading @@ -555,6 +558,20 @@ static void dsi_display_parse_te_gpio(struct dsi_display *display) display->disp_te_gpio = of_get_named_gpio(dev->of_node, "qcom,platform-te-gpio", 0); if (display->fw) rc = dsi_parser_read_u32(display->parser_node, "qcom,panel-te-source", &val); else rc = of_property_read_u32(dev->of_node, "qcom,panel-te-source", &val); if (rc || (val > MAX_TE_SOURCE_ID)) { pr_err("invalid vsync source selection\n"); val = 0; } display->te_source = val; } static int dsi_display_read_status(struct dsi_display_ctrl *ctrl, Loading Loading @@ -3343,8 +3360,8 @@ static int dsi_display_parse_dt(struct dsi_display *display) goto error; } /* Parse TE gpio */ dsi_display_parse_te_gpio(display); /* Parse TE data */ dsi_display_parse_te_data(display); /* Parse external bridge from port 0, reg 0 */ display->ext_bridge_of = of_graph_get_remote_node(of_node, 0, 0); Loading Loading @@ -5179,6 +5196,8 @@ int dsi_display_get_info(struct drm_connector *connector, if (display->panel->esd_config.esd_enabled) info->capabilities |= MSM_DISPLAY_ESD_ENABLED; info->te_source = display->te_source; error: mutex_unlock(&display->display_lock); return rc; Loading drivers/gpu/drm/msm/dsi-staging/dsi_display.h +3 −0 Original line number Diff line number Diff line Loading @@ -172,6 +172,7 @@ struct dsi_display_clk_info { * @misr_enable Frame MISR enable/disable * @misr_frame_count Number of frames to accumulate the MISR value * @esd_trigger field indicating ESD trigger through debugfs * @te_source vsync source pin information */ struct dsi_display { struct platform_device *pdev; Loading Loading @@ -254,6 +255,8 @@ struct dsi_display { void *parser; struct dsi_display_boot_param *boot_disp; u32 te_source; }; int dsi_display_dev_probe(struct platform_device *pdev); Loading drivers/gpu/drm/msm/msm_drv.h +2 −0 Original line number Diff line number Diff line Loading @@ -478,6 +478,7 @@ struct msm_mode_info { * used instead of panel TE in cmd mode panels * @roi_caps: Region of interest capability info * @qsync_min_fps Minimum fps supported by Qsync feature * @te_source vsync source pin information */ struct msm_display_info { int intf_type; Loading @@ -500,6 +501,7 @@ struct msm_display_info { struct msm_roi_caps roi_caps; uint32_t qsync_min_fps; uint32_t te_source; }; #define MSM_MAX_ROI 4 Loading Loading
Documentation/devicetree/bindings/display/msm/sde.txt +0 −3 Original line number Diff line number Diff line Loading @@ -101,8 +101,6 @@ Optional properties: - qcom,sde-dsc-size: A u32 value indicates the address range for each dsc. - qcom,sde-cdm-size: A u32 value indicates the address range for each cdm. - qcom,sde-pp-size: A u32 value indicates the address range for each pingpong. - qcom,sde-te-source: Array of GPIO sources indicating which pingpong TE is sourced to which panel TE gpio. - qcom,sde-wb-size: A u32 value indicates the address range for each writeback. - qcom,sde-len: A u32 entry for SDE address range. - qcom,sde-intf-max-prefetch-lines: Array of u32 values for max prefetch lines on Loading Loading @@ -537,7 +535,6 @@ Example: qcom,sde-pp-off = <0x00071000 0x00071800 0x00072000 0x00072800>; qcom,sde-pp-slave = <0x0 0x0 0x0 0x0>; qcom,sde-te-source = <0x0 0x1 0x0 0x0>; qcom,sde-cdm-off = <0x0007a200>; qcom,sde-dsc-off = <0x00081000 0x00081400>; qcom,sde-intf-max-prefetch-lines = <0x15 0x15 0x15 0x15>; Loading
Documentation/devicetree/bindings/drm/msm/sde-dsi.txt +1 −0 Original line number Diff line number Diff line Loading @@ -59,6 +59,7 @@ Bus Scaling Data: Optional properties: - label: String to describe controller. - qcom,platform-te-gpio: Specifies the gpio used for TE. - qcom,panel-te-source: Specifies the source pin for Vsync from panel or WD Timer. - qcom,dsi-display-active: Current active display - qcom,dsi-ctrl: handle to dsi controller device - qcom,dsi-phy: handle to dsi phy device Loading
drivers/gpu/drm/msm/dsi-staging/dsi_display.c +22 −3 Original line number Diff line number Diff line Loading @@ -42,6 +42,7 @@ #define MAX_NAME_SIZE 64 #define DSI_CLOCK_BITRATE_RADIX 10 #define MAX_TE_SOURCE_ID 2 static char dsi_display_primary[MAX_CMDLINE_PARAM_LEN]; static char dsi_display_secondary[MAX_CMDLINE_PARAM_LEN]; Loading Loading @@ -536,10 +537,12 @@ static bool dsi_display_validate_reg_read(struct dsi_panel *panel) return false; } static void dsi_display_parse_te_gpio(struct dsi_display *display) static void dsi_display_parse_te_data(struct dsi_display *display) { struct platform_device *pdev; struct device *dev; int rc = 0; u32 val = 0; pdev = display->pdev; if (!pdev) { Loading @@ -555,6 +558,20 @@ static void dsi_display_parse_te_gpio(struct dsi_display *display) display->disp_te_gpio = of_get_named_gpio(dev->of_node, "qcom,platform-te-gpio", 0); if (display->fw) rc = dsi_parser_read_u32(display->parser_node, "qcom,panel-te-source", &val); else rc = of_property_read_u32(dev->of_node, "qcom,panel-te-source", &val); if (rc || (val > MAX_TE_SOURCE_ID)) { pr_err("invalid vsync source selection\n"); val = 0; } display->te_source = val; } static int dsi_display_read_status(struct dsi_display_ctrl *ctrl, Loading Loading @@ -3343,8 +3360,8 @@ static int dsi_display_parse_dt(struct dsi_display *display) goto error; } /* Parse TE gpio */ dsi_display_parse_te_gpio(display); /* Parse TE data */ dsi_display_parse_te_data(display); /* Parse external bridge from port 0, reg 0 */ display->ext_bridge_of = of_graph_get_remote_node(of_node, 0, 0); Loading Loading @@ -5179,6 +5196,8 @@ int dsi_display_get_info(struct drm_connector *connector, if (display->panel->esd_config.esd_enabled) info->capabilities |= MSM_DISPLAY_ESD_ENABLED; info->te_source = display->te_source; error: mutex_unlock(&display->display_lock); return rc; Loading
drivers/gpu/drm/msm/dsi-staging/dsi_display.h +3 −0 Original line number Diff line number Diff line Loading @@ -172,6 +172,7 @@ struct dsi_display_clk_info { * @misr_enable Frame MISR enable/disable * @misr_frame_count Number of frames to accumulate the MISR value * @esd_trigger field indicating ESD trigger through debugfs * @te_source vsync source pin information */ struct dsi_display { struct platform_device *pdev; Loading Loading @@ -254,6 +255,8 @@ struct dsi_display { void *parser; struct dsi_display_boot_param *boot_disp; u32 te_source; }; int dsi_display_dev_probe(struct platform_device *pdev); Loading
drivers/gpu/drm/msm/msm_drv.h +2 −0 Original line number Diff line number Diff line Loading @@ -478,6 +478,7 @@ struct msm_mode_info { * used instead of panel TE in cmd mode panels * @roi_caps: Region of interest capability info * @qsync_min_fps Minimum fps supported by Qsync feature * @te_source vsync source pin information */ struct msm_display_info { int intf_type; Loading @@ -500,6 +501,7 @@ struct msm_display_info { struct msm_roi_caps roi_caps; uint32_t qsync_min_fps; uint32_t te_source; }; #define MSM_MAX_ROI 4 Loading