Loading Documentation/devicetree/bindings/clock/qcom,camcc.txt +6 −2 Original line number Diff line number Diff line Loading @@ -2,8 +2,12 @@ Qualcomm Technologies, Inc. Camera Clock & Reset Controller Binding ------------------------------------------------------------------- Required properties : - compatible : must contain "qcom,camcc-sm8150", "qcom,camcc-sm8150-v2" or "qcom,camcc-sdmshrike" or "qcom,camcc-sm6150". - compatible : must contain one of the following: "qcom,camcc-sm8150", "qcom,camcc-sm8150-v2", "qcom,camcc-sdmshrike", "qcom,camcc-sm6150", "qcom,camcc-sdmmagpie". - reg : shall contain base register location and length. - reg-names: names of registers listed in the same order as in the reg property. Loading arch/arm64/boot/dts/qcom/sdmmagpie-gdsc.dtsi +7 −7 Original line number Diff line number Diff line Loading @@ -110,7 +110,7 @@ /* GDSCs in Camera CC */ bps_gdsc: qcom,gdsc@ad07004 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "bps_gdsc"; reg = <0xad07004 0x4>; qcom,poll-cfg-gdscr; Loading @@ -118,7 +118,7 @@ }; ife_0_gdsc: qcom,gdsc@ad0a004 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "ife_0_gdsc"; reg = <0xad0a004 0x4>; qcom,poll-cfg-gdscr; Loading @@ -126,7 +126,7 @@ }; ife_1_gdsc: qcom,gdsc@ad0b004 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "ife_1_gdsc"; reg = <0xad0b004 0x4>; qcom,poll-cfg-gdscr; Loading @@ -134,7 +134,7 @@ }; ipe_0_gdsc: qcom,gdsc@ad08004 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "ipe_0_gdsc"; reg = <0xad08004 0x4>; qcom,poll-cfg-gdscr; Loading @@ -142,7 +142,7 @@ }; ipe_1_gdsc: qcom,gdsc@ad09004 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "ipe_1_gdsc"; reg = <0xad09004 0x4>; qcom,poll-cfg-gdscr; Loading @@ -150,7 +150,7 @@ }; titan_top_gdsc: qcom,gdsc@ad0c1c4 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "titan_top_gdsc"; reg = <0xad0c1c4 0x4>; qcom,poll-cfg-gdscr; Loading @@ -159,7 +159,7 @@ /* GDSCs in Display CC */ mdss_core_gdsc: qcom,gdsc@0f03000 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "mdss_core_gdsc"; reg = <0xaf03000 0x4>; qcom,poll-cfg-gdscr; Loading arch/arm64/boot/dts/qcom/sdmmagpie.dtsi +10 −5 Original line number Diff line number Diff line Loading @@ -655,8 +655,11 @@ }; clock_camcc: qcom,camcc { compatible = "qcom,dummycc"; clock-output-names = "camcc_clocks"; compatible = "qcom,camcc-sdmmagpie", "syscon"; vdd_cx-supply = <&VDD_CX_LEVEL>; vdd_mx-supply = <&VDD_MX_LEVEL>; reg = <0xad00000 0x10000>; reg-names = "cc_base"; #clock-cells = <1>; #reset-cells = <1>; }; Loading @@ -681,9 +684,11 @@ #reset-cells = <1>; }; clock_dispcc: qcom,dispcc { compatible = "qcom,dummycc"; clock-output-names = "dispcc_clocks"; clock_dispcc: qcom,dispcc@af00000 { compatible = "qcom,dispcc-sdmmagpie", "syscon"; vdd_cx-supply = <&VDD_CX_LEVEL>; reg = <0xaf00000 0x20000>; reg-names = "cc_base"; #clock-cells = <1>; #reset-cells = <1>; }; Loading drivers/clk/qcom/Kconfig +9 −0 Original line number Diff line number Diff line Loading @@ -396,6 +396,15 @@ config MSM_DISPCC_SM6150 Say Y if you want to support display devices and functionality such as splash screen. config MSM_CAMCC_SDMMAGPIE tristate "SDMMAGPIE Camera Clock Controller" depends on COMMON_CLK_QCOM help Support for the camera clock controller on Qualcomm Technologies, Inc SDMMAGPIE devices. Say Y if you want to support camera devices and functionality such as capturing pictures. config MSM_DISPCC_SDMMAGPIE tristate "SDMMAGPIE Display Clock Controller" depends on COMMON_CLK_QCOM Loading drivers/clk/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -30,6 +30,7 @@ obj-$(CONFIG_MDM_GCC_QCS405) += gcc-qcs405.o obj-$(CONFIG_MDM_LCC_9615) += lcc-mdm9615.o obj-$(CONFIG_MSM_CAMCC_SM6150) += camcc-sm6150.o obj-$(CONFIG_MSM_CAMCC_SM8150) += camcc-sm8150.o obj-$(CONFIG_MSM_CAMCC_SDMMAGPIE) += camcc-sdmmagpie.o obj-$(CONFIG_MSM_CAMCC_SDMSHRIKE) += camcc-sdmshrike.o obj-$(CONFIG_MSM_CLK_AOP_QMP) += clk-aop-qmp.o obj-$(CONFIG_MSM_CLK_RPMH) += clk-rpmh.o Loading Loading
Documentation/devicetree/bindings/clock/qcom,camcc.txt +6 −2 Original line number Diff line number Diff line Loading @@ -2,8 +2,12 @@ Qualcomm Technologies, Inc. Camera Clock & Reset Controller Binding ------------------------------------------------------------------- Required properties : - compatible : must contain "qcom,camcc-sm8150", "qcom,camcc-sm8150-v2" or "qcom,camcc-sdmshrike" or "qcom,camcc-sm6150". - compatible : must contain one of the following: "qcom,camcc-sm8150", "qcom,camcc-sm8150-v2", "qcom,camcc-sdmshrike", "qcom,camcc-sm6150", "qcom,camcc-sdmmagpie". - reg : shall contain base register location and length. - reg-names: names of registers listed in the same order as in the reg property. Loading
arch/arm64/boot/dts/qcom/sdmmagpie-gdsc.dtsi +7 −7 Original line number Diff line number Diff line Loading @@ -110,7 +110,7 @@ /* GDSCs in Camera CC */ bps_gdsc: qcom,gdsc@ad07004 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "bps_gdsc"; reg = <0xad07004 0x4>; qcom,poll-cfg-gdscr; Loading @@ -118,7 +118,7 @@ }; ife_0_gdsc: qcom,gdsc@ad0a004 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "ife_0_gdsc"; reg = <0xad0a004 0x4>; qcom,poll-cfg-gdscr; Loading @@ -126,7 +126,7 @@ }; ife_1_gdsc: qcom,gdsc@ad0b004 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "ife_1_gdsc"; reg = <0xad0b004 0x4>; qcom,poll-cfg-gdscr; Loading @@ -134,7 +134,7 @@ }; ipe_0_gdsc: qcom,gdsc@ad08004 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "ipe_0_gdsc"; reg = <0xad08004 0x4>; qcom,poll-cfg-gdscr; Loading @@ -142,7 +142,7 @@ }; ipe_1_gdsc: qcom,gdsc@ad09004 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "ipe_1_gdsc"; reg = <0xad09004 0x4>; qcom,poll-cfg-gdscr; Loading @@ -150,7 +150,7 @@ }; titan_top_gdsc: qcom,gdsc@ad0c1c4 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "titan_top_gdsc"; reg = <0xad0c1c4 0x4>; qcom,poll-cfg-gdscr; Loading @@ -159,7 +159,7 @@ /* GDSCs in Display CC */ mdss_core_gdsc: qcom,gdsc@0f03000 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "mdss_core_gdsc"; reg = <0xaf03000 0x4>; qcom,poll-cfg-gdscr; Loading
arch/arm64/boot/dts/qcom/sdmmagpie.dtsi +10 −5 Original line number Diff line number Diff line Loading @@ -655,8 +655,11 @@ }; clock_camcc: qcom,camcc { compatible = "qcom,dummycc"; clock-output-names = "camcc_clocks"; compatible = "qcom,camcc-sdmmagpie", "syscon"; vdd_cx-supply = <&VDD_CX_LEVEL>; vdd_mx-supply = <&VDD_MX_LEVEL>; reg = <0xad00000 0x10000>; reg-names = "cc_base"; #clock-cells = <1>; #reset-cells = <1>; }; Loading @@ -681,9 +684,11 @@ #reset-cells = <1>; }; clock_dispcc: qcom,dispcc { compatible = "qcom,dummycc"; clock-output-names = "dispcc_clocks"; clock_dispcc: qcom,dispcc@af00000 { compatible = "qcom,dispcc-sdmmagpie", "syscon"; vdd_cx-supply = <&VDD_CX_LEVEL>; reg = <0xaf00000 0x20000>; reg-names = "cc_base"; #clock-cells = <1>; #reset-cells = <1>; }; Loading
drivers/clk/qcom/Kconfig +9 −0 Original line number Diff line number Diff line Loading @@ -396,6 +396,15 @@ config MSM_DISPCC_SM6150 Say Y if you want to support display devices and functionality such as splash screen. config MSM_CAMCC_SDMMAGPIE tristate "SDMMAGPIE Camera Clock Controller" depends on COMMON_CLK_QCOM help Support for the camera clock controller on Qualcomm Technologies, Inc SDMMAGPIE devices. Say Y if you want to support camera devices and functionality such as capturing pictures. config MSM_DISPCC_SDMMAGPIE tristate "SDMMAGPIE Display Clock Controller" depends on COMMON_CLK_QCOM Loading
drivers/clk/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -30,6 +30,7 @@ obj-$(CONFIG_MDM_GCC_QCS405) += gcc-qcs405.o obj-$(CONFIG_MDM_LCC_9615) += lcc-mdm9615.o obj-$(CONFIG_MSM_CAMCC_SM6150) += camcc-sm6150.o obj-$(CONFIG_MSM_CAMCC_SM8150) += camcc-sm8150.o obj-$(CONFIG_MSM_CAMCC_SDMMAGPIE) += camcc-sdmmagpie.o obj-$(CONFIG_MSM_CAMCC_SDMSHRIKE) += camcc-sdmshrike.o obj-$(CONFIG_MSM_CLK_AOP_QMP) += clk-aop-qmp.o obj-$(CONFIG_MSM_CLK_RPMH) += clk-rpmh.o Loading