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Commit e909c661 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "msm: ipa4: Update IPA EP configuration to latest"

parents e328f483 e7e08180

drivers/platform/msm/gsi/gsi_reg.h

+8 −1
Original line number Diff line number Diff line
@@ -18,10 +18,17 @@ enum gsi_register_ver { 
	GSI_REGISTER_MAX,

};



#ifdef GSI_REGISTER_VER_CURRENT

#error GSI_REGISTER_VER_CURRENT already defined

#endif



#ifdef CONFIG_GSI_REGISTER_VERSION_2

#include "gsi_reg_v2.h"

#define GSI_REGISTER_VER_CURRENT GSI_REGISTER_VER_2

#else

#endif



/* The default is V1 */

#ifndef GSI_REGISTER_VER_CURRENT

#include "gsi_reg_v1.h"

#define GSI_REGISTER_VER_CURRENT GSI_REGISTER_VER_1

#endif

drivers/platform/msm/ipa/ipa_api.c

+2 −0
Original line number Diff line number Diff line
@@ -196,6 +196,8 @@ const char *ipa_clients_strings[IPA_CLIENT_MAX] = { 
	__stringify(IPA_CLIENT_MHI_DPL_CONS),

	__stringify(RESERVERD_PROD_82),

	__stringify(IPA_CLIENT_ODL_DPL_CONS),

	__stringify(IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD),

	__stringify(IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS),

};



/**

drivers/platform/msm/ipa/ipa_v3/ipa.c

+1 −1
Original line number Diff line number Diff line
@@ -3586,7 +3586,6 @@ void ipa3_enable_clks(void) 
 */

void _ipa_disable_clks_v3_0(void)

{

	ipa3_suspend_apps_pipes(true);

	ipa3_uc_notify_clk_state(false);

	if (ipa3_clk) {

		IPADBG_LOW("disabling gcc_ipa_clk\n");
@@ -3831,6 +3830,7 @@ static void __ipa3_dec_client_disable_clks(void) 
	ret = atomic_sub_return(1, &ipa3_ctx->ipa3_active_clients.cnt);

	if (ret > 0)

		goto unlock_mutex;

	ipa3_suspend_apps_pipes(true);

	ipa3_disable_clks();



unlock_mutex:

drivers/platform/msm/ipa/ipa_v3/ipa_utils.c

+34 −97
Original line number Diff line number Diff line
@@ -174,7 +174,6 @@ 
#define IPA_v4_2_DST_GROUP_MAX		(1)



#define IPA_v4_5_MHI_GROUP_PCIE		(0)

#define IPA_v4_5_ETHERNET		(0)

#define IPA_v4_5_GROUP_UL_DL		(1)

#define IPA_v4_5_MHI_GROUP_DDR		(1)

#define IPA_v4_5_MHI_GROUP_DMA		(2)
@@ -462,14 +461,14 @@ static const struct rsrc_min_max ipa3_rsrc_dst_grp_config 
		{1, 63}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0} },

	},

	[IPA_4_5] = {

		/* ETH  UL/DL/DPL  not used   not used  uC  other are invalid */

		/* not-used UL/DL/DPL not-used not-used uC other are invalid */

		[IPA_v4_0_RSRC_GRP_TYPE_DST_DATA_SECTORS] = {

		{16, 16}, {5, 5}, {0, 0}, {0, 0}, {0, 0}, {0, 0} },

		{0, 0}, {5, 5}, {0, 0}, {0, 0}, {0, 0}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_DST_DPS_DMARS] = {

		{2, 63}, {1, 63}, {0, 0}, {0, 0}, {0, 2}, {0, 0} },

		{0, 0}, {1, 63}, {0, 0}, {0, 0}, {0, 2}, {0, 0} },

	},

	[IPA_4_5_MHI] = {

		/* PCIE/DPL  DDR  DMA  QDSS  uC  other are invalid */

		/* PCIE/DPL  DDR  DMA/CV2X  QDSS  uC  other are invalid */

		[IPA_v4_0_RSRC_GRP_TYPE_DST_DATA_SECTORS] = {

		{16, 16}, {5, 5}, {2, 2}, {2, 2}, {0, 0}, {0, 0} },

		[IPA_v4_0_RSRC_GRP_TYPE_DST_DPS_DMARS] = {
@@ -2054,7 +2053,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			true,

			IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP,

			QMB_MASTER_SELECT_DDR,

			{ 0, 10, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

			{ 0, 11, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

	[IPA_4_5][IPA_CLIENT_APPS_LAN_PROD]	  = {

			true, IPA_v4_5_GROUP_UL_DL,

			false,
@@ -2066,13 +2065,13 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			true,

			IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP,

			QMB_MASTER_SELECT_DDR,

			{ 2, 11, 16, 32, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },

			{ 2, 7, 16, 32, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },

	[IPA_4_5][IPA_CLIENT_APPS_CMD_PROD]	  = {

			true, IPA_v4_5_GROUP_UL_DL,

			false,

			IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY,

			QMB_MASTER_SELECT_DDR,

			{ 7, 8, 20, 24, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },

			{ 7, 9, 20, 24, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },

	[IPA_4_5][IPA_CLIENT_ODU_PROD]            = {

			true, IPA_v4_5_GROUP_UL_DL,

			true,
@@ -2080,7 +2079,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			QMB_MASTER_SELECT_DDR,

			{ 1, 0, 8, 16, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5][IPA_CLIENT_ETHERNET_PROD]	  = {

			true, IPA_v4_5_ETHERNET,

			true, IPA_v4_5_GROUP_UL_DL,

			true,

			IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP,

			QMB_MASTER_SELECT_DDR,
@@ -2109,13 +2108,13 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 0, 10, 8, 16, IPA_EE_AP } },

			{ 0, 11, 8, 16, IPA_EE_AP } },

	[IPA_4_5][IPA_CLIENT_TEST1_PROD]          = {

			true, IPA_v4_5_GROUP_UL_DL,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 0, 10, 8, 16, IPA_EE_AP } },

			{ 0, 11, 8, 16, IPA_EE_AP } },

	[IPA_4_5][IPA_CLIENT_TEST2_PROD]          = {

			true, IPA_v4_5_GROUP_UL_DL,

			true,
@@ -2141,24 +2140,12 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 24, 3, 8, 14, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5][IPA_CLIENT_WLAN2_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 26, 18, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5][IPA_CLIENT_WLAN3_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 27, 19, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5][IPA_CLIENT_USB_CONS]            = {

			true, IPA_v4_5_GROUP_UL_DL,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 25, 17, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

			{ 25, 16, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

	[IPA_4_5][IPA_CLIENT_USB_DPL_CONS]        = {

			true, IPA_v4_5_GROUP_UL_DL,

			false,
@@ -2170,7 +2157,7 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 16, 9, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

			{ 16, 10, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

	[IPA_4_5][IPA_CLIENT_APPS_WAN_CONS]       = {

			true, IPA_v4_5_GROUP_UL_DL,

			false,
@@ -2182,9 +2169,9 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 23, 16, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

			{ 23, 8, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5][IPA_CLIENT_ETHERNET_CONS]	  = {

			true, IPA_v4_5_ETHERNET,

			true, IPA_v4_5_GROUP_UL_DL,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,
@@ -2244,13 +2231,13 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 25, 17, 9, 9, IPA_EE_AP } },

			{ 25, 16, 9, 9, IPA_EE_AP } },

	[IPA_4_5][IPA_CLIENT_TEST4_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 27, 19, 9, 9, IPA_EE_AP } },

			{ 27, 18, 9, 9, IPA_EE_AP } },

	/* Dummy consumer (pipe 31) is used in L2TP rt rule */

	[IPA_4_5][IPA_CLIENT_DUMMY_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL,
@@ -2260,18 +2247,12 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			{ 31, 31, 8, 8, IPA_EE_AP } },



	/* IPA_4_5_MHI */

	[IPA_4_5_MHI][IPA_CLIENT_APPS_WAN_PROD]		= {

			true, IPA_v4_5_MHI_GROUP_DDR,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 2, 11, 16, 32, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },

	[IPA_4_5_MHI][IPA_CLIENT_APPS_CMD_PROD]		= {

			true, IPA_v4_5_MHI_GROUP_DDR,

			false,

			IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY,

			QMB_MASTER_SELECT_DDR,

			{ 7, 8, 20, 24, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },

			{ 7, 9, 20, 24, IPA_EE_AP, GSI_SMART_PRE_FETCH, 8 } },

	[IPA_4_5_MHI][IPA_CLIENT_Q6_WAN_PROD]		= {

			true, IPA_v4_5_MHI_GROUP_DDR,

			true,
@@ -2290,6 +2271,12 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 8, 2, 24, 32, IPA_EE_Q6, GSI_FREE_PRE_FETCH, 5 } },

	[IPA_4_5_MHI][IPA_CLIENT_Q6_AUDIO_DMA_MHI_PROD]	= {

			true, IPA_v4_5_MHI_GROUP_DMA,

			false,

			IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_NO_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 4, 6, 8, 16, IPA_EE_Q6, GSI_ESCAPE_BUF_ONLY, 0 } },

	[IPA_4_5_MHI][IPA_CLIENT_MHI_PROD]		= {

			true, IPA_v4_5_MHI_GROUP_PCIE,

			true,
@@ -2314,38 +2301,14 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 0, 10, 8, 16, IPA_EE_AP } },

	[IPA_4_5_MHI][IPA_CLIENT_TEST1_PROD]          = {

			true, IPA_v4_5_GROUP_UL_DL,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 0, 10, 8, 16, IPA_EE_AP } },

	[IPA_4_5_MHI][IPA_CLIENT_TEST2_PROD]          = {

			true, IPA_v4_5_GROUP_UL_DL,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 1, 0, 8, 16, IPA_EE_AP } },

	[IPA_4_5_MHI][IPA_CLIENT_TEST3_PROD]          = {

			true, IPA_v4_5_GROUP_UL_DL,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 9, 12, 8, 16, IPA_EE_AP } },

	[IPA_4_5_MHI][IPA_CLIENT_TEST4_PROD]          = {

			true, IPA_v4_5_GROUP_UL_DL,

			true,

			IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 11, 13, 8, 16, IPA_EE_AP } },

			{ 0, 11, 8, 16, IPA_EE_AP } },



	[IPA_4_5_MHI][IPA_CLIENT_APPS_LAN_CONS]		= {

			true, IPA_v4_5_MHI_GROUP_DDR,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 16, 9, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

			{ 16, 10, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

	[IPA_4_5_MHI][IPA_CLIENT_Q6_LAN_CONS]		= {

			true, IPA_v4_5_MHI_GROUP_DDR,

			false,
@@ -2376,24 +2339,30 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 18, 4, 9, 9, IPA_EE_Q6, GSI_ESCAPE_BUF_ONLY, 0 } },

	[IPA_4_5_MHI][IPA_CLIENT_Q6_AUDIO_DMA_MHI_CONS]	= {

			true, IPA_v4_5_MHI_GROUP_DMA,

			false,

			IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_NO_UCP,

			QMB_MASTER_SELECT_DDR,

			{ 29, 9, 9, 9, IPA_EE_Q6, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5_MHI][IPA_CLIENT_MEMCPY_DMA_SYNC_CONS]	= {

			true, IPA_v4_5_MHI_GROUP_DMA,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_PCIE,

			{ 26, 18, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

			{ 26, 17, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

	[IPA_4_5_MHI][IPA_CLIENT_MEMCPY_DMA_ASYNC_CONS]	= {

			true, IPA_v4_5_MHI_GROUP_DMA,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_PCIE,

			{ 27, 19, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

			{ 27, 18, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

	[IPA_4_5_MHI][IPA_CLIENT_MHI_CONS]		= {

			true, IPA_v4_5_MHI_GROUP_PCIE,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_PCIE,

			{ 14, 1, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },

			{ 14, 1, 9, 9, IPA_EE_AP, GSI_SMART_PRE_FETCH, 4 } },

	[IPA_4_5_MHI][IPA_CLIENT_MHI_DPL_CONS]		= {

			true, IPA_v4_5_MHI_GROUP_PCIE,

			false,
@@ -2401,38 +2370,6 @@ static const struct ipa_ep_configuration ipa3_ep_mapping 
			QMB_MASTER_SELECT_PCIE,

			{ 22, 2, 5, 5, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY, 0 } },



	/* Only for test purpose */

	/* MBIM aggregation test pipes should have the same QMB as USB_CONS */

	[IPA_4_5_MHI][IPA_CLIENT_TEST_CONS]           = {

			true, IPA_v4_5_GROUP_UL_DL,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 14, 1, 9, 9, IPA_EE_AP } },

	[IPA_4_5_MHI][IPA_CLIENT_TEST1_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 14, 1, 9, 9, IPA_EE_AP } },

	[IPA_4_5_MHI][IPA_CLIENT_TEST2_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 24, 3, 8, 14, IPA_EE_AP } },

	[IPA_4_5_MHI][IPA_CLIENT_TEST3_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 25, 17, 9, 9, IPA_EE_AP } },

	[IPA_4_5_MHI][IPA_CLIENT_TEST4_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL,

			false,

			IPA_DPS_HPS_SEQ_TYPE_INVALID,

			QMB_MASTER_SELECT_DDR,

			{ 27, 18, 9, 9, IPA_EE_AP } },

	/* Dummy consumer (pipe 31) is used in L2TP rt rule */

	[IPA_4_5_MHI][IPA_CLIENT_DUMMY_CONS]          = {

			true, IPA_v4_5_GROUP_UL_DL,

drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal.h

+1 −0
Original line number Diff line number Diff line
@@ -535,6 +535,7 @@ enum ipahal_pkt_status_nat_type { 
 *  the global flt tbl? (if not, then the per endp tables)

 * @flt_ret_hdr: Retain header in filter rule flag: Does matching flt rule

 *  specifies to retain header?

 *  Starting IPA4.5, this will be true only if packet has L2 header.

 * @flt_miss: Filtering miss flag: Was their a filtering rule miss?

 *   In case of miss, all flt info to be ignored

 * @rt_local: Route table location flag: Does matching rt rule belongs to