Loading arch/arm64/boot/dts/qcom/sm8150-pcie.dtsi +0 −8 Original line number Diff line number Diff line Loading @@ -195,10 +195,6 @@ qcom,vreg-cx-voltage-level = <RPMH_REGULATOR_LEVEL_MAX RPMH_REGULATOR_LEVEL_NOM 0>; qcom,l1-supported; qcom,l1ss-supported; qcom,aux-clk-sync; qcom,max-link-speed = <0x3>; qcom,ep-latency = <10>; Loading Loading @@ -485,10 +481,6 @@ qcom,vreg-cx-voltage-level = <RPMH_REGULATOR_LEVEL_MAX RPMH_REGULATOR_LEVEL_NOM 0>; qcom,l1-supported; qcom,l1ss-supported; qcom,aux-clk-sync; qcom,max-link-speed = <0x3>; qcom,ep-latency = <10>; Loading Loading
arch/arm64/boot/dts/qcom/sm8150-pcie.dtsi +0 −8 Original line number Diff line number Diff line Loading @@ -195,10 +195,6 @@ qcom,vreg-cx-voltage-level = <RPMH_REGULATOR_LEVEL_MAX RPMH_REGULATOR_LEVEL_NOM 0>; qcom,l1-supported; qcom,l1ss-supported; qcom,aux-clk-sync; qcom,max-link-speed = <0x3>; qcom,ep-latency = <10>; Loading Loading @@ -485,10 +481,6 @@ qcom,vreg-cx-voltage-level = <RPMH_REGULATOR_LEVEL_MAX RPMH_REGULATOR_LEVEL_NOM 0>; qcom,l1-supported; qcom,l1ss-supported; qcom,aux-clk-sync; qcom,max-link-speed = <0x3>; qcom,ep-latency = <10>; Loading