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Commit 590e8ff0 authored by Mika Kuoppala's avatar Mika Kuoppala Committed by Mika Kuoppala
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drm/i915/gen9: Add WaEnableChickenDCPR 



Workaround for display underrun issues with Y & Yf Tiling.
Set this on all gen9 as stated by bspec.

v2: proper workaround name

References: HSD#2136383, BSID#857
Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1465309159-30531-22-git-send-email-mika.kuoppala@intel.com
parent 954337aa

drivers/gpu/drm/i915/i915_reg.h

+3 −0
Original line number Original line Diff line number Diff line
@@ -6067,6 +6067,9 @@ enum skl_disp_power_wells { 
#define HSW_NDE_RSTWRN_OPT	_MMIO(0x46408)

#define HSW_NDE_RSTWRN_OPT	_MMIO(0x46408)

#define  RESET_PCH_HANDSHAKE_ENABLE	(1<<4)

#define  RESET_PCH_HANDSHAKE_ENABLE	(1<<4)





#define GEN8_CHICKEN_DCPR_1		_MMIO(0x46430)

#define   MASK_WAKEMEM			(1<<13)



#define SKL_DFSM			_MMIO(0x51000)

#define SKL_DFSM			_MMIO(0x51000)

#define SKL_DFSM_CDCLK_LIMIT_MASK	(3 << 23)

#define SKL_DFSM_CDCLK_LIMIT_MASK	(3 << 23)

#define SKL_DFSM_CDCLK_LIMIT_675	(0 << 23)

#define SKL_DFSM_CDCLK_LIMIT_675	(0 << 23)

drivers/gpu/drm/i915/intel_pm.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -65,6 +65,10 @@ static void gen9_init_clock_gating(struct drm_device *dev) 




	I915_WRITE(GEN8_CONFIG0,

	I915_WRITE(GEN8_CONFIG0,

		   I915_READ(GEN8_CONFIG0) | GEN9_DEFAULT_FIXES);

		   I915_READ(GEN8_CONFIG0) | GEN9_DEFAULT_FIXES);



	/* WaEnableChickenDCPR:skl,bxt,kbl */

	I915_WRITE(GEN8_CHICKEN_DCPR_1,

		   I915_READ(GEN8_CHICKEN_DCPR_1) | MASK_WAKEMEM);

}

}





static void bxt_init_clock_gating(struct drm_device *dev)

static void bxt_init_clock_gating(struct drm_device *dev)