Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 954337aa authored by Mika Kuoppala's avatar Mika Kuoppala Committed by Mika Kuoppala
Browse files

drm/i915/kbl: Add WaDisableSbeCacheDispatchPortSharing 



This is needed for all kbl revision.

v2: Don't add revid checks to generic gen9 init (Arun)

References: HSD#2135593
Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1465309159-30531-21-git-send-email-mika.kuoppala@intel.com
parent 4de5d7cc

drivers/gpu/drm/i915/intel_ringbuffer.c

+5 −0
Original line number Diff line number Diff line
@@ -1230,6 +1230,11 @@ static int kbl_init_workarounds(struct intel_engine_cs *engine) 
	/* WaDisableGafsUnitClkGating:kbl */

	WA_SET_BIT(GEN7_UCGCTL4, GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);



	/* WaDisableSbeCacheDispatchPortSharing:kbl */

	WA_SET_BIT_MASKED(

		GEN7_HALF_SLICE_CHICKEN1,

		GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);



	/* WaDisableLSQCROPERFforOCL:kbl */

	ret = wa_ring_whitelist_reg(engine, GEN8_L3SQCREG4);

	if (ret)