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Commit 50360403 authored by Imre Deak's avatar Imre Deak Committed by Daniel Vetter
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drm/i915: suppress false PLL state warnings on non-GMCH platforms 



The checks for PLL enabled state on CPU ports are valid only on GMCH
platforms but atm we'd also call them on non-PCH-split/non-GMCH
platforms like BXT, triggering false warnings. Until the proper check is
implented for these platforms simply disable the check.

Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 977bb38d

drivers/gpu/drm/i915/intel_display.c

+2 −2
Original line number Diff line number Diff line
@@ -2131,7 +2131,7 @@ static void intel_enable_pipe(struct intel_crtc *crtc) 
	 * a plane.  On ILK+ the pipe PLLs are integrated, so we don't

	 * need the check.

	 */

	if (!HAS_PCH_SPLIT(dev_priv->dev))

	if (HAS_GMCH_DISPLAY(dev_priv->dev))

		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI))

			assert_dsi_pll_enabled(dev_priv);

		else
@@ -4666,7 +4666,7 @@ static void intel_crtc_load_lut(struct drm_crtc *crtc) 
	if (!crtc->state->enable || !intel_crtc->active)

		return;



	if (!HAS_PCH_SPLIT(dev_priv->dev)) {

	if (HAS_GMCH_DISPLAY(dev_priv->dev)) {

		if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI))

			assert_dsi_pll_enabled(dev_priv);

		else