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Commit 977bb38d authored by Satheeshakrishna M's avatar Satheeshakrishna M Committed by Daniel Vetter
Browse files

drm/i915/bxt: Determine programmed frequency 



Add placeholder function for calculating programmed pixel clock.
Note: Formula to back calculate link clock from dividers not
available currently.

v2:
- rebased on upstream s/crtc_config/crtc_state/ change (imre)

Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com> (v1)
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 3760b59c

drivers/gpu/drm/i915/intel_ddi.c

+29 −1
Original line number Diff line number Diff line
@@ -880,6 +880,32 @@ static void hsw_ddi_clock_get(struct intel_encoder *encoder, 
		pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;

}



static int bxt_calc_pll_link(struct drm_i915_private *dev_priv,

				enum intel_dpll_id dpll)

{

	/* FIXME formula not available in bspec */

	return 0;

}



static void bxt_ddi_clock_get(struct intel_encoder *encoder,

				struct intel_crtc_state *pipe_config)

{

	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;

	enum port port = intel_ddi_get_encoder_port(encoder);

	uint32_t dpll = port;



	pipe_config->port_clock =

		bxt_calc_pll_link(dev_priv, dpll);



	if (pipe_config->has_dp_encoder)

		pipe_config->base.adjusted_mode.crtc_clock =

			intel_dotclock_calculate(pipe_config->port_clock,

							&pipe_config->dp_m_n);

	else

		pipe_config->base.adjusted_mode.crtc_clock =

							pipe_config->port_clock;

}



void intel_ddi_clock_get(struct intel_encoder *encoder,

			 struct intel_crtc_state *pipe_config)

{
@@ -887,8 +913,10 @@ void intel_ddi_clock_get(struct intel_encoder *encoder, 


	if (INTEL_INFO(dev)->gen <= 8)

		hsw_ddi_clock_get(encoder, pipe_config);

	else

	else if (IS_SKYLAKE(dev))

		skl_ddi_clock_get(encoder, pipe_config);

	else if (IS_BROXTON(dev))

		bxt_ddi_clock_get(encoder, pipe_config);

}



static void

drivers/gpu/drm/i915/intel_dp.c

+2 −0
Original line number Diff line number Diff line
@@ -1471,6 +1471,8 @@ intel_dp_compute_config(struct intel_encoder *encoder, 


	if (IS_SKYLAKE(dev) && is_edp(intel_dp))

		skl_edp_set_pll_config(pipe_config, common_rates[clock]);

	else if (IS_BROXTON(dev))

		/* handled in ddi */;

	else if (IS_HASWELL(dev) || IS_BROADWELL(dev))

		hsw_dp_set_ddi_pll_sel(pipe_config, intel_dp->link_bw);

	else