Loading arch/mips/Kconfig +37 −2 Original line number Diff line number Diff line Loading @@ -415,6 +415,7 @@ config MIPS_MALTA select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_CPU_MIPS32_R2 select SYS_HAS_CPU_MIPS32_R3_5 select SYS_HAS_CPU_MIPS32_R5 select SYS_HAS_CPU_MIPS32_R6 select SYS_HAS_CPU_MIPS64_R1 select SYS_HAS_CPU_MIPS64_R2 Loading @@ -424,6 +425,7 @@ config MIPS_MALTA select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_MICROMIPS select SYS_SUPPORTS_MIPS_CMP Loading Loading @@ -1638,6 +1640,33 @@ config CPU_MIPS32_3_5_EVA One of its primary benefits is an increase in the maximum size of lowmem (up to 3GB). If unsure, say 'N' here. config CPU_MIPS32_R5_FEATURES bool "MIPS32 Release 5 Features" depends on SYS_HAS_CPU_MIPS32_R5 depends on CPU_MIPS32_R2 help Choose this option to build a kernel for release 2 or later of the MIPS32 architecture including features from release 5 such as support for Extended Physical Addressing (XPA). config CPU_MIPS32_R5_XPA bool "Extended Physical Addressing (XPA)" depends on CPU_MIPS32_R5_FEATURES depends on !EVA depends on !PAGE_SIZE_4KB depends on SYS_SUPPORTS_HIGHMEM select XPA select HIGHMEM select ARCH_PHYS_ADDR_T_64BIT default n help Choose this option if you want to enable the Extended Physical Addressing (XPA) on your MIPS32 core (such as P5600 series). The benefit is to increase physical addressing equal to or greater than 40 bits. Note that this has the side effect of turning on 64-bit addressing which in turn makes the PTEs 64-bit in size. If unsure, say 'N' here. if CPU_LOONGSON2F config CPU_NOP_WORKAROUNDS bool Loading Loading @@ -1741,6 +1770,9 @@ config SYS_HAS_CPU_MIPS32_R2 config SYS_HAS_CPU_MIPS32_R3_5 bool config SYS_HAS_CPU_MIPS32_R5 bool config SYS_HAS_CPU_MIPS32_R6 bool Loading Loading @@ -1878,6 +1910,9 @@ config CPU_MIPSR6 config EVA bool config XPA bool config SYS_SUPPORTS_32BIT_KERNEL bool config SYS_SUPPORTS_64BIT_KERNEL Loading Loading @@ -2114,7 +2149,7 @@ config MIPSR2_TO_R6_EMULATOR help Choose this option if you want to run non-R6 MIPS userland code. Even if you say 'Y' here, the emulator will still be disabled by default. You can enable it using the 'mipsr2emul' kernel option. default. You can enable it using the 'mipsr2emu' kernel option. The only reason this is a build-time option is to save ~14K from the final kernel image. comment "MIPS R2-to-R6 emulator is only available for UP kernels" Loading Loading @@ -2184,7 +2219,7 @@ config MIPS_CMP config MIPS_CPS bool "MIPS Coherent Processing System support" depends on SYS_SUPPORTS_MIPS_CPS depends on SYS_SUPPORTS_MIPS_CPS && !64BIT select MIPS_CM select MIPS_CPC select MIPS_CPS_PM if HOTPLUG_CPU Loading arch/mips/Makefile +10 −4 Original line number Diff line number Diff line Loading @@ -197,11 +197,17 @@ endif # Warning: the 64-bit MIPS architecture does not support the `smartmips' extension # Pass -Wa,--no-warn to disable all assembler warnings until the kernel code has # been fixed properly. mips-cflags := "$(cflags-y)" cflags-$(CONFIG_CPU_HAS_SMARTMIPS) += $(call cc-option,$(mips-cflags),-msmartmips) -Wa,--no-warn cflags-$(CONFIG_CPU_MICROMIPS) += $(call cc-option,$(mips-cflags),-mmicromips) mips-cflags := $(cflags-y) ifeq ($(CONFIG_CPU_HAS_SMARTMIPS),y) smartmips-ase := $(call cc-option-yn,$(mips-cflags) -msmartmips) cflags-$(smartmips-ase) += -msmartmips -Wa,--no-warn endif ifeq ($(CONFIG_CPU_MICROMIPS),y) micromips-ase := $(call cc-option-yn,$(mips-cflags) -mmicromips) cflags-$(micromips-ase) += -mmicromips endif ifeq ($(CONFIG_CPU_HAS_MSA),y) toolchain-msa := $(call cc-option-yn,-$(mips-cflags),mhard-float -mfp64 -Wa$(comma)-mmsa) toolchain-msa := $(call cc-option-yn,$(mips-cflags) -mhard-float -mfp64 -Wa$(comma)-mmsa) cflags-$(toolchain-msa) += -DTOOLCHAIN_SUPPORTS_MSA endif Loading arch/mips/bcm47xx/board.c +2 −2 Original line number Diff line number Diff line Loading @@ -235,8 +235,8 @@ static __init const struct bcm47xx_board_type *bcm47xx_board_get_nvram(void) } if (bcm47xx_nvram_getenv("hardware_version", buf1, sizeof(buf1)) >= 0 && bcm47xx_nvram_getenv("boardtype", buf2, sizeof(buf2)) >= 0) { for (e2 = bcm47xx_board_list_boot_hw; e2->value1; e2++) { bcm47xx_nvram_getenv("boardnum", buf2, sizeof(buf2)) >= 0) { for (e2 = bcm47xx_board_list_hw_version_num; e2->value1; e2++) { if (!strstarts(buf1, e2->value1) && !strcmp(buf2, e2->value2)) return &e2->board; Loading arch/mips/bcm63xx/prom.c +0 −4 Original line number Diff line number Diff line Loading @@ -17,7 +17,6 @@ #include <bcm63xx_cpu.h> #include <bcm63xx_io.h> #include <bcm63xx_regs.h> #include <bcm63xx_gpio.h> void __init prom_init(void) { Loading Loading @@ -53,9 +52,6 @@ void __init prom_init(void) reg &= ~mask; bcm_perf_writel(reg, PERF_CKCTL_REG); /* register gpiochip */ bcm63xx_gpio_init(); /* do low level board init */ board_prom_init(); Loading arch/mips/bcm63xx/setup.c +4 −0 Original line number Diff line number Diff line Loading @@ -20,6 +20,7 @@ #include <bcm63xx_cpu.h> #include <bcm63xx_regs.h> #include <bcm63xx_io.h> #include <bcm63xx_gpio.h> void bcm63xx_machine_halt(void) { Loading Loading @@ -160,6 +161,9 @@ void __init plat_mem_setup(void) int __init bcm63xx_register_devices(void) { /* register gpiochip */ bcm63xx_gpio_init(); return board_register_devices(); } Loading Loading
arch/mips/Kconfig +37 −2 Original line number Diff line number Diff line Loading @@ -415,6 +415,7 @@ config MIPS_MALTA select SYS_HAS_CPU_MIPS32_R1 select SYS_HAS_CPU_MIPS32_R2 select SYS_HAS_CPU_MIPS32_R3_5 select SYS_HAS_CPU_MIPS32_R5 select SYS_HAS_CPU_MIPS32_R6 select SYS_HAS_CPU_MIPS64_R1 select SYS_HAS_CPU_MIPS64_R2 Loading @@ -424,6 +425,7 @@ config MIPS_MALTA select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_MICROMIPS select SYS_SUPPORTS_MIPS_CMP Loading Loading @@ -1638,6 +1640,33 @@ config CPU_MIPS32_3_5_EVA One of its primary benefits is an increase in the maximum size of lowmem (up to 3GB). If unsure, say 'N' here. config CPU_MIPS32_R5_FEATURES bool "MIPS32 Release 5 Features" depends on SYS_HAS_CPU_MIPS32_R5 depends on CPU_MIPS32_R2 help Choose this option to build a kernel for release 2 or later of the MIPS32 architecture including features from release 5 such as support for Extended Physical Addressing (XPA). config CPU_MIPS32_R5_XPA bool "Extended Physical Addressing (XPA)" depends on CPU_MIPS32_R5_FEATURES depends on !EVA depends on !PAGE_SIZE_4KB depends on SYS_SUPPORTS_HIGHMEM select XPA select HIGHMEM select ARCH_PHYS_ADDR_T_64BIT default n help Choose this option if you want to enable the Extended Physical Addressing (XPA) on your MIPS32 core (such as P5600 series). The benefit is to increase physical addressing equal to or greater than 40 bits. Note that this has the side effect of turning on 64-bit addressing which in turn makes the PTEs 64-bit in size. If unsure, say 'N' here. if CPU_LOONGSON2F config CPU_NOP_WORKAROUNDS bool Loading Loading @@ -1741,6 +1770,9 @@ config SYS_HAS_CPU_MIPS32_R2 config SYS_HAS_CPU_MIPS32_R3_5 bool config SYS_HAS_CPU_MIPS32_R5 bool config SYS_HAS_CPU_MIPS32_R6 bool Loading Loading @@ -1878,6 +1910,9 @@ config CPU_MIPSR6 config EVA bool config XPA bool config SYS_SUPPORTS_32BIT_KERNEL bool config SYS_SUPPORTS_64BIT_KERNEL Loading Loading @@ -2114,7 +2149,7 @@ config MIPSR2_TO_R6_EMULATOR help Choose this option if you want to run non-R6 MIPS userland code. Even if you say 'Y' here, the emulator will still be disabled by default. You can enable it using the 'mipsr2emul' kernel option. default. You can enable it using the 'mipsr2emu' kernel option. The only reason this is a build-time option is to save ~14K from the final kernel image. comment "MIPS R2-to-R6 emulator is only available for UP kernels" Loading Loading @@ -2184,7 +2219,7 @@ config MIPS_CMP config MIPS_CPS bool "MIPS Coherent Processing System support" depends on SYS_SUPPORTS_MIPS_CPS depends on SYS_SUPPORTS_MIPS_CPS && !64BIT select MIPS_CM select MIPS_CPC select MIPS_CPS_PM if HOTPLUG_CPU Loading
arch/mips/Makefile +10 −4 Original line number Diff line number Diff line Loading @@ -197,11 +197,17 @@ endif # Warning: the 64-bit MIPS architecture does not support the `smartmips' extension # Pass -Wa,--no-warn to disable all assembler warnings until the kernel code has # been fixed properly. mips-cflags := "$(cflags-y)" cflags-$(CONFIG_CPU_HAS_SMARTMIPS) += $(call cc-option,$(mips-cflags),-msmartmips) -Wa,--no-warn cflags-$(CONFIG_CPU_MICROMIPS) += $(call cc-option,$(mips-cflags),-mmicromips) mips-cflags := $(cflags-y) ifeq ($(CONFIG_CPU_HAS_SMARTMIPS),y) smartmips-ase := $(call cc-option-yn,$(mips-cflags) -msmartmips) cflags-$(smartmips-ase) += -msmartmips -Wa,--no-warn endif ifeq ($(CONFIG_CPU_MICROMIPS),y) micromips-ase := $(call cc-option-yn,$(mips-cflags) -mmicromips) cflags-$(micromips-ase) += -mmicromips endif ifeq ($(CONFIG_CPU_HAS_MSA),y) toolchain-msa := $(call cc-option-yn,-$(mips-cflags),mhard-float -mfp64 -Wa$(comma)-mmsa) toolchain-msa := $(call cc-option-yn,$(mips-cflags) -mhard-float -mfp64 -Wa$(comma)-mmsa) cflags-$(toolchain-msa) += -DTOOLCHAIN_SUPPORTS_MSA endif Loading
arch/mips/bcm47xx/board.c +2 −2 Original line number Diff line number Diff line Loading @@ -235,8 +235,8 @@ static __init const struct bcm47xx_board_type *bcm47xx_board_get_nvram(void) } if (bcm47xx_nvram_getenv("hardware_version", buf1, sizeof(buf1)) >= 0 && bcm47xx_nvram_getenv("boardtype", buf2, sizeof(buf2)) >= 0) { for (e2 = bcm47xx_board_list_boot_hw; e2->value1; e2++) { bcm47xx_nvram_getenv("boardnum", buf2, sizeof(buf2)) >= 0) { for (e2 = bcm47xx_board_list_hw_version_num; e2->value1; e2++) { if (!strstarts(buf1, e2->value1) && !strcmp(buf2, e2->value2)) return &e2->board; Loading
arch/mips/bcm63xx/prom.c +0 −4 Original line number Diff line number Diff line Loading @@ -17,7 +17,6 @@ #include <bcm63xx_cpu.h> #include <bcm63xx_io.h> #include <bcm63xx_regs.h> #include <bcm63xx_gpio.h> void __init prom_init(void) { Loading Loading @@ -53,9 +52,6 @@ void __init prom_init(void) reg &= ~mask; bcm_perf_writel(reg, PERF_CKCTL_REG); /* register gpiochip */ bcm63xx_gpio_init(); /* do low level board init */ board_prom_init(); Loading
arch/mips/bcm63xx/setup.c +4 −0 Original line number Diff line number Diff line Loading @@ -20,6 +20,7 @@ #include <bcm63xx_cpu.h> #include <bcm63xx_regs.h> #include <bcm63xx_io.h> #include <bcm63xx_gpio.h> void bcm63xx_machine_halt(void) { Loading Loading @@ -160,6 +161,9 @@ void __init plat_mem_setup(void) int __init bcm63xx_register_devices(void) { /* register gpiochip */ bcm63xx_gpio_init(); return board_register_devices(); } Loading