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Commit 3d954cf1 authored by Dinh Nguyen's avatar Dinh Nguyen Committed by Olof Johansson
Browse files

ARM: socfpga: dts: Add ethernet bindings for SOCFPGA 



Add entry for 2nd GMAC controller. Add the correct clocks for the GMAC.

Signed-off-by: default avatarDinh Nguyen <dinguyen@altera.com>
Reviewed-by: default avatarPavel Machek <pavel@denx.de>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Olof Johansson <olof@lixom.net>
Cc: Pavel Machek <pavel@denx.de>
CC: <linux@arm.linux.org.uk>

v2:
- Moved "disabled" status to dtsi file
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent 6cd26ece

arch/arm/boot/dts/socfpga.dtsi

+16 −2
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 


	aliases {

		ethernet0 = &gmac0;

		ethernet1 = &gmac1;

		serial0 = &uart0;

		serial1 = &uart1;

		timer0 = &timer0;
@@ -238,13 +239,26 @@ 
				};

			};



		gmac0: stmmac@ff700000 {

		gmac0: ethernet@ff700000 {

			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";

			reg = <0xff700000 0x2000>;

			interrupts = <0 115 4>;

			interrupt-names = "macirq";

			mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */

			phy-mode = "gmii";

			clocks = <&emac0_clk>;

			clock-names = "stmmaceth";

			status = "disabled";

		};



		gmac1: ethernet@ff702000 {

			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";

			reg = <0xff702000 0x2000>;

			interrupts = <0 120 4>;

			interrupt-names = "macirq";

			mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */

			clocks = <&emac1_clk>;

			clock-names = "stmmaceth";

			status = "disabled";

		};



		L2: l2-cache@fffef000 {

arch/arm/boot/dts/socfpga_cyclone5.dts

+13 −0
Original line number Diff line number Diff line
@@ -32,6 +32,13 @@ 
		reg = <0x0 0x40000000>; /* 1GB */

	};



	aliases {

		/* this allow the ethaddr uboot environmnet variable contents

		 * to be added to the gmac1 device tree blob.

		 */

		ethernet0 = &gmac1;

	};



	soc {

		clkmgr@ffd04000 {

			clocks {
@@ -41,6 +48,12 @@ 
			};

		};



		ethernet@ff702000 {

			phy-mode = "rgmii";

			phy-addr = <0xffffffff>; /* probe for phy addr */

			status = "okay";

		};



		timer0@ffc08000 {

			clock-frequency = <100000000>;

		};

arch/arm/boot/dts/socfpga_vt.dts

+5 −0
Original line number Diff line number Diff line
@@ -41,6 +41,11 @@ 
			};

		};



		ethernet@ff700000 {

			phy-mode = "gmii";

			status = "okay";

		};



		timer0@ffc08000 {

			clock-frequency = <7000000>;

		};