Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 3668b45d authored by Dan Williams's avatar Dan Williams Committed by Russell King
Browse files

[ARM] 4187/1: iop: unify time implementation across iop32x, iop33x, and iop13xx 



* architecture specific details are handled in asm/arch/time.h
* ARCH_IOP13XX now selects PLAT_IOP
* as suggested by Lennert use ifdef CONFIG_XSCALE to skip the cp_wait on
XSC3

Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 4434c5c7

arch/arm/mach-iop13xx/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -5,7 +5,6 @@ obj- := 


obj-$(CONFIG_ARCH_IOP13XX) += setup.o

obj-$(CONFIG_ARCH_IOP13XX) += irq.o

obj-$(CONFIG_ARCH_IOP13XX) += time.o

obj-$(CONFIG_ARCH_IOP13XX) += pci.o

obj-$(CONFIG_ARCH_IOP13XX) += io.o

obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o

arch/arm/mach-iop13xx/iq81340mc.c

+3 −2
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 
#include <asm/mach/arch.h>

#include <asm/arch/pci.h>

#include <asm/mach/time.h>

#include <asm/arch/time.h>



extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */
@@ -78,12 +79,12 @@ static void __init iq81340mc_init(void) 


static void __init iq81340mc_timer_init(void)

{

	iop13xx_init_time(400000000);

	iop_init_time(400000000);

}



static struct sys_timer iq81340mc_timer = {

       .init       = iq81340mc_timer_init,

       .offset     = iop13xx_gettimeoffset,

       .offset     = iop_gettimeoffset,

};



MACHINE_START(IQ81340MC, "Intel IQ81340MC")

arch/arm/mach-iop13xx/iq81340sc.c

+3 −2
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@ 
#include <asm/mach/arch.h>

#include <asm/arch/pci.h>

#include <asm/mach/time.h>

#include <asm/arch/time.h>



extern int init_atu;
@@ -80,12 +81,12 @@ static void __init iq81340sc_init(void) 


static void __init iq81340sc_timer_init(void)

{

	iop13xx_init_time(400000000);

	iop_init_time(400000000);

}



static struct sys_timer iq81340sc_timer = {

       .init       = iq81340sc_timer_init,

       .offset     = iop13xx_gettimeoffset,

       .offset     = iop_gettimeoffset,

};



MACHINE_START(IQ81340SC, "Intel IQ81340SC")

arch/arm/mach-iop13xx/time.c

deleted100644 → 0
+0 −92
Original line number Diff line number Diff line 
/*

 * arch/arm/mach-iop13xx/time.c

 *

 * Timer code for IOP13xx (copied from IOP32x/IOP33x implementation)

 *

 * Author: Deepak Saxena <dsaxena@mvista.com>

 *

 * Copyright 2002-2003 MontaVista Software Inc.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms of the GNU General Public License as published by the

 * Free Software Foundation; either version 2 of the License, or (at your

 * option) any later version.

 */



#include <linux/kernel.h>

#include <linux/interrupt.h>

#include <linux/time.h>

#include <linux/init.h>

#include <linux/timex.h>

#include <asm/io.h>

#include <asm/irq.h>

#include <asm/uaccess.h>

#include <asm/mach/irq.h>

#include <asm/mach/time.h>



static unsigned long ticks_per_jiffy;

static unsigned long ticks_per_usec;

static unsigned long next_jiffy_time;



static inline u32 read_tcr1(void)

{

	u32 val;

	asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val));

	return val;

}



unsigned long iop13xx_gettimeoffset(void)

{

	unsigned long offset;



	offset = next_jiffy_time - read_tcr1();



	return offset / ticks_per_usec;

}



static irqreturn_t

iop13xx_timer_interrupt(int irq, void *dev_id)

{

	write_seqlock(&xtime_lock);



	asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (1));



	while ((signed long)(next_jiffy_time - read_tcr1())

							>= ticks_per_jiffy) {

		timer_tick();

		next_jiffy_time -= ticks_per_jiffy;

	}



	write_sequnlock(&xtime_lock);



	return IRQ_HANDLED;

}



static struct irqaction iop13xx_timer_irq = {

	.name		= "IOP13XX Timer Tick",

	.handler	= iop13xx_timer_interrupt,

	.flags		= IRQF_DISABLED | IRQF_TIMER,

};



void __init iop13xx_init_time(unsigned long tick_rate)

{

	u32 timer_ctl;



	ticks_per_jiffy = (tick_rate + HZ/2) / HZ;

	ticks_per_usec = tick_rate / 1000000;

	next_jiffy_time = 0xffffffff;



	timer_ctl = IOP13XX_TMR_EN | IOP13XX_TMR_PRIVILEGED |

			IOP13XX_TMR_RELOAD | IOP13XX_TMR_RATIO_1_1;



	/*

	 * We use timer 0 for our timer interrupt, and timer 1 as

	 * monotonic counter for tracking missed jiffies.

	 */

	asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (ticks_per_jiffy - 1));

	asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (timer_ctl));

	asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (0xffffffff));

	asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (timer_ctl));



	setup_irq(IRQ_IOP13XX_TIMER0, &iop13xx_timer_irq);

}

arch/arm/mach-iop32x/glantank.c

+3 −2
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 
#include <asm/mach/time.h>

#include <asm/mach-types.h>

#include <asm/page.h>

#include <asm/arch/time.h>



/*

 * GLAN Tank timer tick configuration.
@@ -38,12 +39,12 @@ 
static void __init glantank_timer_init(void)

{

	/* 33.333 MHz crystal.  */

	iop3xx_init_time(200000000);

	iop_init_time(200000000);

}



static struct sys_timer glantank_timer = {

	.init		= glantank_timer_init,

	.offset		= iop3xx_gettimeoffset,

	.offset		= iop_gettimeoffset,

};