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Commit 4434c5c7 authored by Dan Williams's avatar Dan Williams Committed by Russell King
Browse files

[ARM] 4186/1: iop: remove cp6_enable/disable routines 



This functionality is replaced by cp6_trap

Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent f80dff9d

arch/arm/mach-iop13xx/irq.c

+0 −19
Original line number Diff line number Diff line
@@ -161,65 +161,49 @@ static void write_intsize(u32 val) 
static void

iop13xx_irq_mask0 (unsigned int irq)

{

	u32 cp_flags = iop13xx_cp6_save();

	write_intctl_0(read_intctl_0() & ~(1 << (irq - 0)));

	iop13xx_cp6_restore(cp_flags);

}



static void

iop13xx_irq_mask1 (unsigned int irq)

{

	u32 cp_flags = iop13xx_cp6_save();

	write_intctl_1(read_intctl_1() & ~(1 << (irq - 32)));

	iop13xx_cp6_restore(cp_flags);

}



static void

iop13xx_irq_mask2 (unsigned int irq)

{

	u32 cp_flags = iop13xx_cp6_save();

	write_intctl_2(read_intctl_2() & ~(1 << (irq - 64)));

	iop13xx_cp6_restore(cp_flags);

}



static void

iop13xx_irq_mask3 (unsigned int irq)

{

	u32 cp_flags = iop13xx_cp6_save();

	write_intctl_3(read_intctl_3() & ~(1 << (irq - 96)));

	iop13xx_cp6_restore(cp_flags);

}



static void

iop13xx_irq_unmask0(unsigned int irq)

{

	u32 cp_flags = iop13xx_cp6_save();

	write_intctl_0(read_intctl_0() | (1 << (irq - 0)));

	iop13xx_cp6_restore(cp_flags);

}



static void

iop13xx_irq_unmask1(unsigned int irq)

{

	u32 cp_flags = iop13xx_cp6_save();

	write_intctl_1(read_intctl_1() | (1 << (irq - 32)));

	iop13xx_cp6_restore(cp_flags);

}



static void

iop13xx_irq_unmask2(unsigned int irq)

{

	u32 cp_flags = iop13xx_cp6_save();

	write_intctl_2(read_intctl_2() | (1 << (irq - 64)));

	iop13xx_cp6_restore(cp_flags);

}



static void

iop13xx_irq_unmask3(unsigned int irq)

{

	u32 cp_flags = iop13xx_cp6_save();

	write_intctl_3(read_intctl_3() | (1 << (irq - 96)));

	iop13xx_cp6_restore(cp_flags);

}



static struct irq_chip iop13xx_irqchip1 = {
@@ -256,7 +240,6 @@ void __init iop13xx_init_irq(void) 
{

	unsigned int i;



	u32 cp_flags = iop13xx_cp6_save();

	iop_init_cp6_handler();



	/* disable all interrupts */
@@ -288,6 +271,4 @@ void __init iop13xx_init_irq(void) 
		set_irq_handler(i, handle_level_irq);

		set_irq_flags(i, IRQF_VALID | IRQF_PROBE);

	}



	iop13xx_cp6_restore(cp_flags);

}

arch/arm/mach-iop13xx/time.c

+0 −10
Original line number Diff line number Diff line
@@ -38,11 +38,8 @@ static inline u32 read_tcr1(void) 
unsigned long iop13xx_gettimeoffset(void)

{

	unsigned long offset;

	u32 cp_flags;



	cp_flags = iop13xx_cp6_save();

	offset = next_jiffy_time - read_tcr1();

	iop13xx_cp6_restore(cp_flags);



	return offset / ticks_per_usec;

}
@@ -50,8 +47,6 @@ unsigned long iop13xx_gettimeoffset(void) 
static irqreturn_t

iop13xx_timer_interrupt(int irq, void *dev_id)

{

	u32 cp_flags = iop13xx_cp6_save();



	write_seqlock(&xtime_lock);



	asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (1));
@@ -64,8 +59,6 @@ iop13xx_timer_interrupt(int irq, void *dev_id) 


	write_sequnlock(&xtime_lock);



	iop13xx_cp6_restore(cp_flags);



	return IRQ_HANDLED;

}
@@ -78,7 +71,6 @@ static struct irqaction iop13xx_timer_irq = { 
void __init iop13xx_init_time(unsigned long tick_rate)

{

	u32 timer_ctl;

	u32 cp_flags;



	ticks_per_jiffy = (tick_rate + HZ/2) / HZ;

	ticks_per_usec = tick_rate / 1000000;
@@ -91,12 +83,10 @@ void __init iop13xx_init_time(unsigned long tick_rate) 
	 * We use timer 0 for our timer interrupt, and timer 1 as

	 * monotonic counter for tracking missed jiffies.

	 */

	cp_flags = iop13xx_cp6_save();

	asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (ticks_per_jiffy - 1));

	asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (timer_ctl));

	asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (0xffffffff));

	asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (timer_ctl));

	iop13xx_cp6_restore(cp_flags);



	setup_irq(IRQ_IOP13XX_TIMER0, &iop13xx_timer_irq);

}

arch/arm/mach-iop32x/irq.c

+0 −4
Original line number Diff line number Diff line
@@ -23,16 +23,12 @@ static u32 iop32x_mask; 


static inline void intctl_write(u32 val)

{

	iop3xx_cp6_enable();

	asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));

	iop3xx_cp6_disable();

}



static inline void intstr_write(u32 val)

{

	iop3xx_cp6_enable();

	asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val));

	iop3xx_cp6_disable();

}



static void

arch/arm/mach-iop33x/irq.c

+0 −12
Original line number Diff line number Diff line
@@ -24,44 +24,32 @@ static u32 iop33x_mask1; 


static inline void intctl0_write(u32 val)

{

	iop3xx_cp6_enable();

	asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));

	iop3xx_cp6_disable();

}



static inline void intctl1_write(u32 val)

{

	iop3xx_cp6_enable();

	asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val));

	iop3xx_cp6_disable();

}



static inline void intstr0_write(u32 val)

{

	iop3xx_cp6_enable();

	asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val));

	iop3xx_cp6_disable();

}



static inline void intstr1_write(u32 val)

{

	iop3xx_cp6_enable();

	asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val));

	iop3xx_cp6_disable();

}



static inline void intbase_write(u32 val)

{

	iop3xx_cp6_enable();

	asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val));

	iop3xx_cp6_disable();

}



static inline void intsize_write(u32 val)

{

	iop3xx_cp6_enable();

	asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val));

	iop3xx_cp6_disable();

}



static void

arch/arm/plat-iop/time.c

+0 −4
Original line number Diff line number Diff line
@@ -51,9 +51,7 @@ iop3xx_timer_interrupt(int irq, void *dev_id) 
{

	write_seqlock(&xtime_lock);



	iop3xx_cp6_enable();

	asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1));

	iop3xx_cp6_disable();



	while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1)

							>= ticks_per_jiffy) {
@@ -87,12 +85,10 @@ void __init iop3xx_init_time(unsigned long tick_rate) 
	 * We use timer 0 for our timer interrupt, and timer 1 as

	 * monotonic counter for tracking missed jiffies.

	 */

	iop3xx_cp6_enable();

	asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1));

	asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));

	asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff));

	asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl));

	iop3xx_cp6_disable();



	setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq);

}