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Commit 2fe3bbf5 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: Add support for GCC_USB3_PHY_PRIM_SP0_BCR"

parents 07de3e84 0599ebd9

drivers/clk/qcom/gcc-sm6150.c

+1 −1
Original line number Diff line number Diff line
@@ -3424,8 +3424,8 @@ static const struct qcom_reset_map gcc_sm6150_resets[] = { 
	[GCC_PCIE_PHY_COM_BCR] = { 0x6f010 },

	[GCC_UFS_PHY_BCR] = { 0x77000 },

	[GCC_USB20_SEC_BCR] = { 0xa6000 },

	[GCC_USB3_DP_PHY_PRIM_SP0_BCR] = { 0x50010 },

	[GCC_USB3PHY_PHY_PRIM_SP0_BCR] = { 0x50008 },

	[GCC_USB3_PHY_PRIM_SP0_BCR] = { 0x50000 },

};



static struct clk_dfs gcc_dfs_clocks[] = {

include/dt-bindings/clock/qcom,gcc-sm6150.h

+1 −1
Original line number Diff line number Diff line
@@ -204,7 +204,7 @@ 
#define GCC_PCIE_PHY_COM_BCR			9

#define GCC_UFS_PHY_BCR				10

#define GCC_USB20_SEC_BCR			11

#define GCC_USB3_DP_PHY_PRIM_SP0_BCR		12

#define GCC_USB3_PHY_PRIM_SP0_BCR		12

#define GCC_USB3PHY_PHY_PRIM_SP0_BCR		13



#endif