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Commit 24eda1e6 authored Apr 12, 2019 by qctecmdr Committed by Gerrit - the friendly Code Review server Apr 12, 2019

Merge "ARM: dts: msm: Update compatible property for clock nodes for sa6155"

parents f1e6b5aa 2d7c9475

Documentation/devicetree/bindings/clock/qcom,camcc.txt

+2 −1

Original line number	Diff line number	Diff line
		@@ -7,7 +7,8 @@ Required properties :
		"qcom,camcc-sm8150-v2",
		"qcom,camcc-sdmshrike",
		"qcom,camcc-sm6150",
		"qcom,camcc-sdmmagpie".
		"qcom,camcc-sdmmagpie",
		"qcom,camcc-sa6155".
		- reg : shall contain base register location and length.
		- reg-names: names of registers listed in the same order as in
		the reg property.

Documentation/devicetree/bindings/clock/qcom,dispcc.txt

+2 −1

Original line number	Diff line number	Diff line
		@@ -8,7 +8,8 @@ Required properties :
		"qcom,dispcc-sm6150",
		"qcom,dispcc-sdmmagpie",
		"qcom,dispcc-trinket",
		"qcom,dispcc-sdmshrike-v2".
		"qcom,dispcc-sdmshrike-v2",
		"qcom,dispcc-sa6155".
		- reg : Shall contain base register location and length.
		- reg-names: Address name. Must be "cc_base".
		- vdd_mm-supply: phandle to the MM_CX rail that needs to be voted on behalf

Documentation/devicetree/bindings/clock/qcom,gcc.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -27,6 +27,7 @@ Required properties :
		"qcom,gcc-sdmmagpie"
		"qcom,gcc-sdxprairie"
		"qcom,gcc-trinket"
		"qcom,gcc-sa6155"

		- reg : shall contain base register location and length
		- #clock-cells : shall contain 1

Documentation/devicetree/bindings/clock/qcom,gpucc.txt

+2 −1

Original line number	Diff line number	Diff line
		@@ -7,7 +7,8 @@ Required properties :
		"qcom,gpucc-sdmshrike",
		"qcom,gpucc-sm6150",
		"qcom,gpucc-sdmmagpie",
		"qcom,gpucc-trinket".
		"qcom,gpucc-trinket",
		"qcom,gpucc-sa6155".

		- reg : shall contain base register offset and size.
		- reg-names: names of registers listed in the same order as in the reg property.

Documentation/devicetree/bindings/clock/qcom,scc.txt

+1 −1

Original line number	Diff line number	Diff line
		@@ -2,7 +2,7 @@ Qualcomm Technologies, Inc. Sensor Clock Controller Bindings

		Required properties:
		- compatible: shall contain "qcom,scc-sm8150" or "qcom,scc-sm8150-v2" or
		"qcom,scc-sm6150".
		"qcom,scc-sm6150" or qcom,scc-sa6155".
		- reg: shall contain base register location and length.
		- vdd_scc_cx-supply: the logic rail supply.
		- #clock-cells: shall contain 1.