Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2d7c9475 authored by Diptanshu Jamgade's avatar Diptanshu Jamgade
Browse files

ARM: dts: msm: Update compatible property for clock nodes for sa6155 



Update compatible property for clock nodes for sa6155 to remove
TURBO_L1 corner voting from clock driver as there is no TURBO_L1
corner on sa6155.

Change-Id: I7e7a01f382f8d7bc1caa24aca01729a7f874d17e
Signed-off-by: default avatarDiptanshu Jamgade <djamgade@codeaurora.org>
parent 312071e1

arch/arm64/boot/dts/qcom/sa6155.dtsi

+15 −0
Original line number Diff line number Diff line
@@ -58,16 +58,31 @@ 
	status = "ok";

};



&clock_gcc {

	compatible = "qcom,gcc-sa6155", "syscon";

};



&clock_videocc {

	compatible = "qcom,videocc-sa6155", "syscon";

};



&clock_dispcc {

	compatible = "qcom,dispcc-sa6155", "syscon";

};



&clock_scc {

	compatible = "qcom,scc-sa6155", "syscon";

	vdd_scc_cx-supply = <&VDD_CX_LEVEL>;

	status = "ok";

};



&clock_camcc {

	compatible = "qcom,camcc-sa6155", "syscon";

	vdd_mx-supply = <&VDD_CX_LEVEL>;

};



&clock_gpucc {

	compatible = "qcom,gpucc-sa6155", "syscon";

	vdd_mx-supply = <&VDD_CX_LEVEL>;

};

arch/arm64/boot/dts/qcom/sa6155p.dtsi

+15 −0
Original line number Diff line number Diff line
@@ -128,16 +128,31 @@ 
	status = "ok";

};



&clock_gcc {

	compatible = "qcom,gcc-sa6155", "syscon";

};



&clock_videocc {

	compatible = "qcom,videocc-sa6155", "syscon";

};



&clock_dispcc {

	compatible = "qcom,dispcc-sa6155", "syscon";

};



&clock_scc {

	compatible = "qcom,scc-sa6155", "syscon";

	vdd_scc_cx-supply = <&VDD_CX_LEVEL>;

	status = "ok";

};



&clock_camcc {

	compatible = "qcom,camcc-sa6155", "syscon";

	vdd_mx-supply = <&VDD_CX_LEVEL>;

};



&clock_gpucc {

	compatible = "qcom,gpucc-sa6155", "syscon";

	vdd_mx-supply = <&VDD_CX_LEVEL>;

};