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Commit 1fc0a8f7 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin Committed by Daniel Vetter
Browse files

drm/i915/skl: Take 90/270 rotation into account in watermark calculations 



v2: Pass in rotation info to sprite plane updates as well.

v3: Use helper to determine 90/270 rotation. (Michel Thierry)

v4: Rebased for fb modifiers and atomic changes.

For: VIZ-4546
Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Michel Thierry <michel.thierry@intel.com> (v3)
Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 121920fa

drivers/gpu/drm/i915/intel_display.c

+23 −4
Original line number Diff line number Diff line
@@ -12033,6 +12033,28 @@ static void intel_shared_dpll_init(struct drm_device *dev) 
	BUG_ON(dev_priv->num_shared_dpll > I915_NUM_PLLS);

}



/**

 * intel_wm_need_update - Check whether watermarks need updating

 * @plane: drm plane

 * @state: new plane state

 *

 * Check current plane state versus the new one to determine whether

 * watermarks need to be recalculated.

 *

 * Returns true or false.

 */

bool intel_wm_need_update(struct drm_plane *plane,

			  struct drm_plane_state *state)

{

	/* Update watermarks on tiling changes. */

	if (!plane->state->fb || !state->fb ||

	    plane->state->fb->modifier[0] != state->fb->modifier[0] ||

	    plane->state->rotation != state->rotation)

		return true;



	return false;

}



/**

 * intel_prepare_plane_fb - Prepare fb for usage on plane

 * @plane: drm plane to prepare for
@@ -12179,10 +12201,7 @@ intel_check_primary_plane(struct drm_plane *plane, 


		intel_crtc->atomic.update_fbc = true;



		/* Update watermarks on tiling changes. */

		if (!plane->state->fb || !state->base.fb ||

		    plane->state->fb->modifier[0] !=

		    state->base.fb->modifier[0])

		if (intel_wm_need_update(plane, &state->base))

			intel_crtc->atomic.update_wm = true;

	}

drivers/gpu/drm/i915/intel_drv.h

+4 −0
Original line number Diff line number Diff line
@@ -501,6 +501,7 @@ struct intel_plane_wm_parameters { 
	bool enabled;

	bool scaled;

	u64 tiling;

	unsigned int rotation;

};



struct intel_plane {
@@ -994,6 +995,9 @@ intel_rotation_90_or_270(unsigned int rotation) 
	return rotation & (BIT(DRM_ROTATE_90) | BIT(DRM_ROTATE_270));

}



bool intel_wm_need_update(struct drm_plane *plane,

			  struct drm_plane_state *state);



/* shared dpll functions */

struct intel_shared_dpll *intel_crtc_to_shared_dpll(struct intel_crtc *crtc);

void assert_shared_dpll(struct drm_i915_private *dev_priv,

drivers/gpu/drm/i915/intel_pm.c

+17 −1
Original line number Diff line number Diff line
@@ -2840,6 +2840,7 @@ static void skl_compute_wm_pipe_parameters(struct drm_crtc *crtc, 
		}

		p->plane[0].horiz_pixels = intel_crtc->config->pipe_src_w;

		p->plane[0].vert_pixels = intel_crtc->config->pipe_src_h;

		p->plane[0].rotation = crtc->primary->state->rotation;



		fb = crtc->cursor->state->fb;

		if (fb) {
@@ -2897,7 +2898,21 @@ static bool skl_compute_plane_wm(const struct drm_i915_private *dev_priv, 


	if (p_params->tiling == I915_FORMAT_MOD_Y_TILED ||

	    p_params->tiling == I915_FORMAT_MOD_Yf_TILED) {

		uint32_t y_tile_minimum = plane_blocks_per_line * 4;

		uint32_t min_scanlines = 4;

		uint32_t y_tile_minimum;

		if (intel_rotation_90_or_270(p_params->rotation)) {

			switch (p_params->bytes_per_pixel) {

			case 1:

				min_scanlines = 16;

				break;

			case 2:

				min_scanlines = 8;

				break;

			case 8:

				WARN(1, "Unsupported pixel depth for rotation");

			};

		}

		y_tile_minimum = plane_blocks_per_line * min_scanlines;

		selected_result = max(method2, y_tile_minimum);

	} else {

		if ((ddb_allocation / plane_blocks_per_line) >= 1)
@@ -3357,6 +3372,7 @@ skl_update_sprite_wm(struct drm_plane *plane, struct drm_crtc *crtc, 
	 */

	if (fb)

		intel_plane->wm.tiling = fb->modifier[0];

	intel_plane->wm.rotation = plane->state->rotation;



	skl_update_wm(crtc);

}

drivers/gpu/drm/i915/intel_sprite.c

+1 −4
Original line number Diff line number Diff line
@@ -1039,10 +1039,7 @@ intel_check_sprite_plane(struct drm_plane *plane, 
		if (!intel_crtc->primary_enabled && !state->hides_primary)

			intel_crtc->atomic.post_enable_primary = true;



		/* Update watermarks on tiling changes. */

		if (!plane->state->fb || !state->base.fb ||

		    plane->state->fb->modifier[0] !=

		    state->base.fb->modifier[0])

		if (intel_wm_need_update(plane, &state->base))

			intel_crtc->atomic.update_wm = true;



		if (!state->visible) {