Loading drivers/hwtracing/coresight/coresight-tmc-etr.c +0 −1 Original line number Diff line number Diff line Loading @@ -937,7 +937,6 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) tmc_etr_enable_hw(drvdata); drvdata->enable = true; drvdata->sticky_enable = true; out: spin_unlock_irqrestore(&drvdata->spinlock, flags); Loading drivers/hwtracing/coresight/coresight-tmc.c +1 −2 Original line number Diff line number Diff line Loading @@ -141,7 +141,6 @@ static void __tmc_reg_dump(struct tmc_drvdata *drvdata) void tmc_enable_hw(struct tmc_drvdata *drvdata) { drvdata->enable = true; drvdata->sticky_enable = true; writel_relaxed(TMC_CTL_CAPT_EN, drvdata->base + TMC_CTL); if (drvdata->force_reg_dump) __tmc_reg_dump(drvdata); Loading @@ -157,7 +156,7 @@ static int tmc_read_prepare(struct tmc_drvdata *drvdata) { int ret = 0; if (!drvdata->sticky_enable) if (!drvdata->enable) return -EPERM; switch (drvdata->config_type) { Loading drivers/hwtracing/coresight/coresight.c +58 −32 Original line number Diff line number Diff line Loading @@ -206,10 +206,12 @@ static int coresight_enable_link(struct coresight_device *csdev, if (atomic_inc_return(&csdev->refcnt[refport]) == 1) { if (link_ops(csdev)->enable) { ret = link_ops(csdev)->enable(csdev, inport, outport); if (ret) if (ret) { atomic_dec(&csdev->refcnt[refport]); return ret; } } } csdev->enable = true; Loading Loading @@ -296,13 +298,12 @@ static bool coresight_disable_source(struct coresight_device *csdev) return !csdev->enable; } void coresight_disable_path(struct list_head *path) static void coresigh_disable_list_node(struct list_head *path, struct coresight_node *nd) { u32 type; struct coresight_node *nd; struct coresight_device *csdev, *parent, *child; list_for_each_entry(nd, path, link) { csdev = nd->csdev; type = csdev->type; Loading Loading @@ -333,6 +334,31 @@ void coresight_disable_path(struct list_head *path) break; } } /** * During enabling path, if it is failed, then only those enabled * devices need to be disabled. This function is to disable devices * which is enabled before the failed device. * * @path the head of the list * @nd the failed device node */ static void coresight_disable_previous_devs(struct list_head *path, struct coresight_node *nd) { list_for_each_entry_continue(nd, path, link) { coresigh_disable_list_node(path, nd); } } void coresight_disable_path(struct list_head *path) { struct coresight_node *nd; list_for_each_entry(nd, path, link) { coresigh_disable_list_node(path, nd); } } int coresight_enable_path(struct list_head *path, u32 mode) Loading Loading @@ -382,7 +408,7 @@ int coresight_enable_path(struct list_head *path, u32 mode) out: return ret; err: coresight_disable_path(path); coresight_disable_previous_devs(path, nd); goto out; } Loading Loading
drivers/hwtracing/coresight/coresight-tmc-etr.c +0 −1 Original line number Diff line number Diff line Loading @@ -937,7 +937,6 @@ static int tmc_enable_etr_sink_sysfs(struct coresight_device *csdev) tmc_etr_enable_hw(drvdata); drvdata->enable = true; drvdata->sticky_enable = true; out: spin_unlock_irqrestore(&drvdata->spinlock, flags); Loading
drivers/hwtracing/coresight/coresight-tmc.c +1 −2 Original line number Diff line number Diff line Loading @@ -141,7 +141,6 @@ static void __tmc_reg_dump(struct tmc_drvdata *drvdata) void tmc_enable_hw(struct tmc_drvdata *drvdata) { drvdata->enable = true; drvdata->sticky_enable = true; writel_relaxed(TMC_CTL_CAPT_EN, drvdata->base + TMC_CTL); if (drvdata->force_reg_dump) __tmc_reg_dump(drvdata); Loading @@ -157,7 +156,7 @@ static int tmc_read_prepare(struct tmc_drvdata *drvdata) { int ret = 0; if (!drvdata->sticky_enable) if (!drvdata->enable) return -EPERM; switch (drvdata->config_type) { Loading
drivers/hwtracing/coresight/coresight.c +58 −32 Original line number Diff line number Diff line Loading @@ -206,10 +206,12 @@ static int coresight_enable_link(struct coresight_device *csdev, if (atomic_inc_return(&csdev->refcnt[refport]) == 1) { if (link_ops(csdev)->enable) { ret = link_ops(csdev)->enable(csdev, inport, outport); if (ret) if (ret) { atomic_dec(&csdev->refcnt[refport]); return ret; } } } csdev->enable = true; Loading Loading @@ -296,13 +298,12 @@ static bool coresight_disable_source(struct coresight_device *csdev) return !csdev->enable; } void coresight_disable_path(struct list_head *path) static void coresigh_disable_list_node(struct list_head *path, struct coresight_node *nd) { u32 type; struct coresight_node *nd; struct coresight_device *csdev, *parent, *child; list_for_each_entry(nd, path, link) { csdev = nd->csdev; type = csdev->type; Loading Loading @@ -333,6 +334,31 @@ void coresight_disable_path(struct list_head *path) break; } } /** * During enabling path, if it is failed, then only those enabled * devices need to be disabled. This function is to disable devices * which is enabled before the failed device. * * @path the head of the list * @nd the failed device node */ static void coresight_disable_previous_devs(struct list_head *path, struct coresight_node *nd) { list_for_each_entry_continue(nd, path, link) { coresigh_disable_list_node(path, nd); } } void coresight_disable_path(struct list_head *path) { struct coresight_node *nd; list_for_each_entry(nd, path, link) { coresigh_disable_list_node(path, nd); } } int coresight_enable_path(struct list_head *path, u32 mode) Loading Loading @@ -382,7 +408,7 @@ int coresight_enable_path(struct list_head *path, u32 mode) out: return ret; err: coresight_disable_path(path); coresight_disable_previous_devs(path, nd); goto out; } Loading