Loading drivers/gpu/drm/msm/msm_smmu.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -249,7 +249,7 @@ static int msm_smmu_map_dma_buf(struct msm_mmu *mmu, struct sg_table *sgt, &sgt->sgl->dma_address, sgt->sgl->dma_length, &sgt->sgl->dma_address, sgt->sgl->dma_length, dir, attrs); dir, attrs); SDE_EVT32(sgt->sgl->dma_address, sgt->sgl->dma_length, SDE_EVT32(sgt->sgl->dma_address, sgt->sgl->dma_length, dir, attrs); dir, attrs, client->secure); } } return 0; return 0; Loading @@ -272,7 +272,7 @@ static void msm_smmu_unmap_dma_buf(struct msm_mmu *mmu, struct sg_table *sgt, &sgt->sgl->dma_address, sgt->sgl->dma_length, &sgt->sgl->dma_address, sgt->sgl->dma_length, dir); dir); SDE_EVT32(sgt->sgl->dma_address, sgt->sgl->dma_length, SDE_EVT32(sgt->sgl->dma_address, sgt->sgl->dma_length, dir); dir, client->secure); } } if (!(flags & MSM_BO_EXTBUF)) if (!(flags & MSM_BO_EXTBUF)) Loading drivers/gpu/drm/msm/sde/sde_hw_sspp.c +14 −9 Original line number Original line Diff line number Diff line Loading @@ -389,7 +389,6 @@ static void sde_hw_sspp_setup_secure(struct sde_hw_pipe *ctx, c = &ctx->hw; c = &ctx->hw; if (enable) { if ((rect_mode == SDE_SSPP_RECT_SOLO) if ((rect_mode == SDE_SSPP_RECT_SOLO) || (rect_mode == SDE_SSPP_RECT_0)) || (rect_mode == SDE_SSPP_RECT_0)) secure_bit_mask = secure_bit_mask = Loading @@ -398,10 +397,16 @@ static void sde_hw_sspp_setup_secure(struct sde_hw_pipe *ctx, secure_bit_mask = 0xA; secure_bit_mask = 0xA; secure = SDE_REG_READ(c, SSPP_SRC_ADDR_SW_STATUS + idx); secure = SDE_REG_READ(c, SSPP_SRC_ADDR_SW_STATUS + idx); if (enable) secure |= secure_bit_mask; secure |= secure_bit_mask; } else secure &= ~secure_bit_mask; SDE_REG_WRITE(c, SSPP_SRC_ADDR_SW_STATUS + idx, secure); SDE_REG_WRITE(c, SSPP_SRC_ADDR_SW_STATUS + idx, secure); /* multiple planes share same sw_status register */ wmb(); } } Loading Loading
drivers/gpu/drm/msm/msm_smmu.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -249,7 +249,7 @@ static int msm_smmu_map_dma_buf(struct msm_mmu *mmu, struct sg_table *sgt, &sgt->sgl->dma_address, sgt->sgl->dma_length, &sgt->sgl->dma_address, sgt->sgl->dma_length, dir, attrs); dir, attrs); SDE_EVT32(sgt->sgl->dma_address, sgt->sgl->dma_length, SDE_EVT32(sgt->sgl->dma_address, sgt->sgl->dma_length, dir, attrs); dir, attrs, client->secure); } } return 0; return 0; Loading @@ -272,7 +272,7 @@ static void msm_smmu_unmap_dma_buf(struct msm_mmu *mmu, struct sg_table *sgt, &sgt->sgl->dma_address, sgt->sgl->dma_length, &sgt->sgl->dma_address, sgt->sgl->dma_length, dir); dir); SDE_EVT32(sgt->sgl->dma_address, sgt->sgl->dma_length, SDE_EVT32(sgt->sgl->dma_address, sgt->sgl->dma_length, dir); dir, client->secure); } } if (!(flags & MSM_BO_EXTBUF)) if (!(flags & MSM_BO_EXTBUF)) Loading
drivers/gpu/drm/msm/sde/sde_hw_sspp.c +14 −9 Original line number Original line Diff line number Diff line Loading @@ -389,7 +389,6 @@ static void sde_hw_sspp_setup_secure(struct sde_hw_pipe *ctx, c = &ctx->hw; c = &ctx->hw; if (enable) { if ((rect_mode == SDE_SSPP_RECT_SOLO) if ((rect_mode == SDE_SSPP_RECT_SOLO) || (rect_mode == SDE_SSPP_RECT_0)) || (rect_mode == SDE_SSPP_RECT_0)) secure_bit_mask = secure_bit_mask = Loading @@ -398,10 +397,16 @@ static void sde_hw_sspp_setup_secure(struct sde_hw_pipe *ctx, secure_bit_mask = 0xA; secure_bit_mask = 0xA; secure = SDE_REG_READ(c, SSPP_SRC_ADDR_SW_STATUS + idx); secure = SDE_REG_READ(c, SSPP_SRC_ADDR_SW_STATUS + idx); if (enable) secure |= secure_bit_mask; secure |= secure_bit_mask; } else secure &= ~secure_bit_mask; SDE_REG_WRITE(c, SSPP_SRC_ADDR_SW_STATUS + idx, secure); SDE_REG_WRITE(c, SSPP_SRC_ADDR_SW_STATUS + idx, secure); /* multiple planes share same sw_status register */ wmb(); } } Loading