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Commit 129c29c4 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'lpc18xx_dts_for_4.4' of https://github.com/manabian/linux-lpc into next/dt

Pull "Device Tree additions for NXP LPC18xx platform" from Joachim Eastwood:
 - Reset controller (RGU)
 - DMA controller and mux
 - SPI Flash (SPIFI) controller
 - I2C controller
 - Watchdog and SCT PWM from Ariel D'Alessandro

And board updates for EA4357 dev kit and Hitex LPC4350 eval board
adding I2C, SPIFI Flash and some miscellaneous stuff.

* tag 'lpc18xx_dts_for_4.4' of https://github.com/manabian/linux-lpc:
  ARM: dts: lpc4350-hitex-eval: add joystick, buttons and leds
  ARM: dts: lpc4350-hitex-eval: add i2c0 and devices
  ARM: dts: lpc4350-hitex-eval: add spifi and flash device
  ARM: dts: lpc4357-ea4357: add i2c0 and devices
  ARM: dts: lpc4357-ea4357: add ssp0
  ARM: dts: lpc4357-ea4357: add spifi and flash device
  ARM: dts: lpc18xx: add resets entry to device nodes
  ARM: dts: lpc18xx: add sct pwm node
  ARM: dts: lpc18xx: add watchdog node
  ARM: dts: lpc18xx: add i2c nodes
  ARM: dts: lpc18xx: add dma to uart0/1/2/3
  ARM: dts: lpc18xx: add dma to ssp0/1
  ARM: dts: lpc18xx: add dmamux node
  ARM: dts: lpc18xx: add dmac node
  ARM: dts: lpc18xx: add spifi node
  ARM: dts: lpc18xx: add rgu node
parents c52864fb 6031d8bb
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+134 −0
Original line number Diff line number Diff line
@@ -68,6 +68,46 @@
	};

	soc {
		sct_pwm: pwm@40000000 {
			compatible = "nxp,lpc1850-sct-pwm";
			reg = <0x40000000 0x1000>;
			clocks =<&ccu1 CLK_CPU_SCT>;
			clock-names = "pwm";
			resets = <&rgu 37>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		dmac: dma-controller@40002000 {
			compatible = "arm,pl080", "arm,primecell";
			arm,primecell-periphid = <0x00041080>;
			reg = <0x40002000 0x1000>;
			interrupts = <2>;
			clocks = <&ccu1 CLK_CPU_DMA>;
			clock-names = "apb_pclk";
			resets = <&rgu 19>;
			#dma-cells = <2>;
			dma-channels = <8>;
			dma-requests = <16>;
			lli-bus-interface-ahb1;
			lli-bus-interface-ahb2;
			mem-bus-interface-ahb1;
			mem-bus-interface-ahb2;
			memcpy-burst-size = <256>;
			memcpy-bus-width = <32>;
		};

		spifi: flash-controller@40003000 {
			compatible = "nxp,lpc1773-spifi";
			reg = <0x40003000 0x1000>, <0x14000000 0x4000000>;
			reg-names = "spifi", "flash";
			interrupts = <30>;
			clocks = <&ccu1 CLK_SPIFI>, <&ccu1 CLK_CPU_SPIFI>;
			clock-names = "spifi", "reg";
			resets = <&rgu 53>;
			status = "disabled";
		};

		mmcsd: mmcsd@40004000 {
			compatible = "snps,dw-mshc";
			reg = <0x40004000 0x1000>;
@@ -75,6 +115,7 @@
			num-slots = <1>;
			clocks = <&ccu2 CLK_SDIO>, <&ccu1 CLK_CPU_SDIO>;
			clock-names = "ciu", "biu";
			resets = <&rgu 20>;
			status = "disabled";
		};

@@ -83,6 +124,7 @@
			reg = <0x40006100 0x100>;
			interrupts = <8>;
			clocks = <&ccu1 CLK_CPU_USB0>;
			resets = <&rgu 17>;
			phys = <&usb0_otg_phy>;
			phy-names = "usb";
			has-transaction-translator;
@@ -94,6 +136,7 @@
			reg = <0x40007100 0x100>;
			interrupts = <9>;
			clocks = <&ccu1 CLK_CPU_USB1>;
			resets = <&rgu 18>;
			status = "disabled";
		};

@@ -102,6 +145,7 @@
			reg = <0x40005000 0x1000>;
			clocks = <&ccu1 CLK_CPU_EMCDIV>, <&ccu1 CLK_CPU_EMC>;
			clock-names = "mpmcclk", "apb_pclk";
			resets = <&rgu 21>;
			#address-cells = <2>;
			#size-cells = <1>;
			ranges = <0 0 0x1c000000 0x1000000
@@ -118,6 +162,7 @@
			interrupt-names = "combined";
			clocks = <&cgu BASE_LCD_CLK>, <&ccu1 CLK_CPU_LCD>;
			clock-names = "clcdclk", "apb_pclk";
			resets = <&rgu 16>;
			status = "disabled";
		};

@@ -128,6 +173,8 @@
			interrupt-names	= "macirq";
			clocks = <&ccu1 CLK_CPU_ETHERNET>;
			clock-names = "stmmaceth";
			resets = <&rgu 22>;
			reset-names = "stmmaceth";
			status = "disabled";
		};

@@ -135,12 +182,20 @@
			compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd";
			reg = <0x40043000 0x1000>;
			clocks = <&ccu1 CLK_CPU_CREG>;
			resets = <&rgu 5>;

			usb0_otg_phy: phy@004 {
				compatible = "nxp,lpc1850-usb-otg-phy";
				clocks = <&ccu1 CLK_USB0>;
				#phy-cells = <0>;
			};

			dmamux: dma-mux@11c {
				compatible = "nxp,lpc1850-dmamux";
				#dma-cells = <3>;
				dma-requests = <64>;
				dma-masters = <&dmac>;
			};
		};

		cgu: clock-controller@40050000 {
@@ -178,6 +233,22 @@
				      "base_ssp0_clk",  "base_sdio_clk";
		};

		rgu: reset-controller@40053000 {
			compatible = "nxp,lpc1850-rgu";
			reg = <0x40053000 0x1000>;
			clocks = <&cgu BASE_SAFE_CLK>, <&ccu1 CLK_CPU_BUS>;
			clock-names = "delay", "reg";
			#reset-cells = <1>;
		};

		watchdog@40080000 {
			compatible = "nxp,lpc1850-wwdt";
			reg = <0x40080000 0x24>;
			interrupts = <49>;
			clocks = <&cgu BASE_SAFE_CLK>, <&ccu1 CLK_CPU_WWDT>;
			clock-names = "wdtclk", "reg";
		};

		uart0: serial@40081000 {
			compatible = "nxp,lpc1850-uart", "ns16550a";
			reg = <0x40081000 0x1000>;
@@ -185,6 +256,12 @@
			interrupts = <24>;
			clocks = <&ccu2 CLK_APB0_UART0>, <&ccu1 CLK_CPU_UART0>;
			clock-names = "uartclk", "reg";
			resets = <&rgu 44>;
			dmas = <&dmamux  1 1 2
				&dmamux  2 1 2
				&dmamux 11 2 2
				&dmamux 12 2 2>;
			dma-names = "tx", "rx", "tx", "rx";
			status = "disabled";
		};

@@ -195,6 +272,10 @@
			interrupts = <25>;
			clocks = <&ccu2 CLK_APB0_UART1>, <&ccu1 CLK_CPU_UART1>;
			clock-names = "uartclk", "reg";
			resets = <&rgu 45>;
			dmas = <&dmamux 3 1 2
				&dmamux 4 1 2>;
			dma-names = "tx", "rx";
			status = "disabled";
		};

@@ -204,6 +285,10 @@
			interrupts = <22>;
			clocks = <&ccu2 CLK_APB0_SSP0>, <&ccu1 CLK_CPU_SSP0>;
			clock-names = "sspclk", "apb_pclk";
			resets = <&rgu 50>;
			dmas = <&dmamux  9 0 2
				&dmamux 10 0 2>;
			dma-names = "rx", "tx";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
@@ -215,6 +300,7 @@
			interrupts = <12>;
			clocks = <&ccu1 CLK_CPU_TIMER0>;
			clock-names = "timerclk";
			resets = <&rgu 32>;
		};

		timer1: timer@40085000 {
@@ -223,6 +309,7 @@
			interrupts = <13>;
			clocks = <&ccu1 CLK_CPU_TIMER1>;
			clock-names = "timerclk";
			resets = <&rgu 33>;
		};

		pinctrl: pinctrl@40086000 {
@@ -231,11 +318,23 @@
			clocks = <&ccu1 CLK_CPU_SCU>;
		};

		i2c0: i2c@400a1000 {
			compatible = "nxp,lpc1788-i2c";
			reg = <0x400a1000 0x1000>;
			interrupts = <18>;
			clocks = <&ccu1 CLK_APB1_I2C0>;
			resets = <&rgu 48>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		can1: can@400a4000 {
			compatible = "bosch,c_can";
			reg = <0x400a4000 0x1000>;
			interrupts = <43>;
			clocks = <&ccu1 CLK_APB1_CAN1>;
			resets = <&rgu 54>;
			status = "disabled";
		};

@@ -246,6 +345,10 @@
			interrupts = <26>;
			clocks = <&ccu2 CLK_APB2_UART2>, <&ccu1 CLK_CPU_UART2>;
			clock-names = "uartclk", "reg";
			resets = <&rgu 46>;
			dmas = <&dmamux 5 1 2
				&dmamux 6 1 2>;
			dma-names = "tx", "rx";
			status = "disabled";
		};

@@ -256,6 +359,12 @@
			interrupts = <27>;
			clocks = <&ccu2 CLK_APB2_UART3>, <&ccu1 CLK_CPU_UART3>;
			clock-names = "uartclk", "reg";
			resets = <&rgu 47>;
			dmas = <&dmamux  7 1 2
				&dmamux  8 1 2
				&dmamux 13 3 2
				&dmamux 14 3 2>;
			dma-names = "tx", "rx", "rx", "tx";
			status = "disabled";
		};

@@ -265,6 +374,7 @@
			interrupts = <14>;
			clocks = <&ccu1 CLK_CPU_TIMER2>;
			clock-names = "timerclk";
			resets = <&rgu 34>;
		};

		timer3: timer@400c4000 {
@@ -273,6 +383,7 @@
			interrupts = <15>;
			clocks = <&ccu1 CLK_CPU_TIMER3>;
			clock-names = "timerclk";
			resets = <&rgu 35>;
		};

		ssp1: spi@400c5000 {
@@ -281,6 +392,28 @@
			interrupts = <23>;
			clocks = <&ccu2 CLK_APB2_SSP1>, <&ccu1 CLK_CPU_SSP1>;
			clock-names = "sspclk", "apb_pclk";
			resets = <&rgu 51>;
			dmas = <&dmamux 11 2 2
				&dmamux 12 2 2
				&dmamux  3 3 2
				&dmamux  4 3 2
				&dmamux  5 2 2
				&dmamux  6 2 2
				&dmamux 13 2 2
				&dmamux 14 2 2>;
			dma-names = "rx", "tx", "tx", "rx",
				    "tx", "rx", "rx", "tx";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		i2c1: i2c@400e0000 {
			compatible = "nxp,lpc1788-i2c";
			reg = <0x400e0000 0x1000>;
			interrupts = <19>;
			clocks = <&ccu1 CLK_APB3_I2C1>;
			resets = <&rgu 49>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
@@ -291,6 +424,7 @@
			reg = <0x400e2000 0x1000>;
			interrupts = <51>;
			clocks = <&ccu1 CLK_APB3_CAN0>;
			resets = <&rgu 55>;
			status = "disabled";
		};

+175 −0
Original line number Diff line number Diff line
@@ -15,6 +15,9 @@
#include "lpc18xx.dtsi"
#include "lpc4350.dtsi"

#include "dt-bindings/input/input.h"
#include "dt-bindings/gpio/gpio.h"

/ {
	model = "Hitex LPC4350 Evaluation Board";
	compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
@@ -34,6 +37,88 @@
		device_type = "memory";
		reg = <0x28000000 0x800000>; /* 8 MB */
	};

	pca_buttons {
		compatible = "gpio-keys-polled";
		#address-cells = <1>;
		#size-cells = <0>;
		poll-interval = <100>;
		autorepeat;

		button@0 {
			label = "joy:right";
			linux,code = <KEY_RIGHT>;
			gpios = <&pca_gpio 8 GPIO_ACTIVE_LOW>;
		};

		button@1 {
			label = "joy:up";
			linux,code = <KEY_UP>;
			gpios = <&pca_gpio 9 GPIO_ACTIVE_LOW>;
		};


		button@2 {
			label = "joy:enter";
			linux,code = <KEY_ENTER>;
			gpios = <&pca_gpio 10 GPIO_ACTIVE_LOW>;
		};

		button@3 {
			label = "joy:left";
			linux,code = <KEY_LEFT>;
			gpios = <&pca_gpio 11 GPIO_ACTIVE_LOW>;
		};

		button@4 {
			label = "joy:down";
			linux,code = <KEY_DOWN>;
			gpios = <&pca_gpio 12 GPIO_ACTIVE_LOW>;
		};

		button@5 {
			label = "user:sw3";
			linux,code = <KEY_F1>;
			gpios = <&pca_gpio 13 GPIO_ACTIVE_LOW>;
		};

		button@6 {
			label = "user:sw4";
			linux,code = <KEY_F2>;
			gpios = <&pca_gpio 14 GPIO_ACTIVE_LOW>;
		};

		button@7 {
			label = "user:sw5";
			linux,code = <KEY_F3>;
			gpios = <&pca_gpio 15 GPIO_ACTIVE_LOW>;
		};
	};

	pca_leds {
		compatible = "gpio-leds";

		led0 {
			label = "ext:led0";
			gpios = <&pca_gpio 0 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "heartbeat";
		};

		led1 {
			label = "ext:led1";
			gpios = <&pca_gpio 1 GPIO_ACTIVE_LOW>;
		};

		led2 {
			label = "ext:led2";
			gpios = <&pca_gpio 2 GPIO_ACTIVE_LOW>;
		};

		led3 {
			label = "ext:led3";
			gpios = <&pca_gpio 3 GPIO_ACTIVE_LOW>;
		};
	};
};

&pinctrl {
@@ -186,6 +271,43 @@
		};
	};

	i2c0_pins: i2c0-pins {
		i2c0_pins_cfg {
			pins = "i2c0_scl", "i2c0_sda";
			function = "i2c0";
			input-enable;
		};
	};

	spifi_pins: spifi-pins {
		spifi_clk_cfg {
			pins = "p3_3";
			function = "spifi";
			slew-rate = <1>;
			bias-disable;
			input-enable;
			input-schmitt-disable;
		};

		spifi_mosi_miso_sio2_3_cfg {
			pins = "p3_7", "p3_6", "p3_5", "p3_4";
			function = "spifi";
			slew-rate = <1>;
			bias-disable;
			input-enable;
			input-schmitt-disable;
		};

		spifi_cs_cfg {
			pins = "p3_8";
			function = "spifi";
			slew-rate = <1>;
			bias-disable;
			input-enable;
			input-schmitt-disable;
		};
	};

	uart0_pins: uart0-pins {
		uart0_rx_cfg {
			pins = "pf_11";
@@ -271,6 +393,31 @@
	clock-frequency = <25000000>;
};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	clock-frequency = <400000>;

	/* NXP SE97BTP with temperature sensor + eeprom */
	sensor@18 {
		compatible = "nxp,jc42";
		reg = <0x18>;
	};

	eeprom@50 {
		compatible = "nxp,24c02";
		reg = <0x50>;
	};

	pca_gpio: gpio@24 {
		compatible = "nxp,pca9673";
		reg = <0x24>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&mac {
	status = "okay";
	phy-mode = "mii";
@@ -278,6 +425,34 @@
	pinctrl-0 = <&enet_mii_pins>;
};

&spifi {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spifi_pins>;

	flash@0 {
		compatible = "jedec,spi-nor";
		spi-rx-bus-width = <4>;
		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "bootloader";
			reg = <0x000000 0x040000>; /* 256 KiB */
		};

		partition@1 {
			label = "kernel";
			reg = <0x040000 0x2c0000>; /* 2.75 MiB */
		};

		partition@2 {
			label = "rootfs";
			reg = <0x300000 0x500000>; /* 5 MiB */
		};
	};
};

&uart0 {
	status = "okay";
	pinctrl-names = "default";
+95 −0
Original line number Diff line number Diff line
@@ -332,6 +332,14 @@
		};
	};

	i2c0_pins: i2c0-pins {
		i2c0_pins_cfg {
			pins = "i2c0_scl", "i2c0_sda";
			function = "i2c0";
			input-enable;
		};
	};

	sdmmc_pins: sdmmc-pins {
		sdmmc_clk_cfg {
			pins = "pc_0";
@@ -363,6 +371,49 @@
		};
	};

	spifi_pins: spifi-pins {
		spifi_clk_cfg {
			pins = "p3_3";
			function = "spifi";
			slew-rate = <1>;
			bias-disable;
			input-enable;
			input-schmitt-disable;
		};

		spifi_mosi_miso_sio2_3_cfg {
			pins = "p3_7", "p3_6", "p3_5", "p3_4";
			function = "spifi";
			slew-rate = <0>;
			bias-disable;
			input-enable;
			input-schmitt-disable;
		};

		spifi_cs_cfg {
			pins = "p3_8";
			function = "spifi";
			bias-disable;
		};
	};

	ssp0_pins: ssp0-pins {
		ssp0_sck_miso_mosi {
			pins = "pf_0", "pf_2", "pf_3";
			function = "ssp0";
			slew-rate = <1>;
			bias-pull-down;
			input-enable;
			input-schmitt-disable;
		};

		ssp0_ssel {
			pins = "pf_1";
			function = "ssp0";
			bias-pull-up;
		};
	};

	uart0_pins: uart0-pins {
		uart0_rx_cfg {
			pins = "pf_11";
@@ -410,6 +461,23 @@
	};
};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	clock-frequency = <400000>;

	lm75@48 {
		compatible = "nxp,lm75";
		reg = <0x48>;
	};

	eeprom@57 {
		compatible = "microchip,24c64";
		reg = <0x57>;
	};
};

&emc {
	status = "okay";
	pinctrl-names = "default";
@@ -489,6 +557,33 @@
	pinctrl-0 = <&sdmmc_pins>;
};

&spifi {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spifi_pins>;

	flash@0 {
		compatible = "jedec,spi-nor";
		spi-cpol;
		spi-cpha;
		spi-rx-bus-width = <4>;
		#address-cells = <1>;
		#size-cells = <1>;

		partition@0 {
			label = "data";
			reg = <0 0x200000>;
		};
	};
};

&ssp0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&ssp0_pins>;
	num-cs = <1>;
};

&uart0 {
	status = "okay";
	pinctrl-names = "default";