Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 05fb7291 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: move select_se_sh into the gfx struct 



It's gfx IP specific, not asic specific, so move to a
gfx callback.

Reviewed-by: default avatarChunming Zhou <david1.zhou@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b95e31fd

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+2 −0
Original line number Diff line number Diff line
@@ -1153,6 +1153,7 @@ struct amdgpu_cu_info { 
struct amdgpu_gfx_funcs {

	/* get the gpu clock counter */

	uint64_t (*get_gpu_clock_counter)(struct amdgpu_device *adev);

	void (*select_se_sh)(struct amdgpu_device *adev, u32 se_num, u32 sh_num);

};



struct amdgpu_gfx {
@@ -2282,6 +2283,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring) 
#define amdgpu_dpm_vblank_too_short(adev) (adev)->pm.funcs->vblank_too_short((adev))

#define amdgpu_dpm_enable_bapm(adev, e) (adev)->pm.funcs->enable_bapm((adev), (e))

#define amdgpu_gfx_get_gpu_clock_counter(adev) (adev)->gfx.funcs->get_gpu_clock_counter((adev))

#define amdgpu_gfx_select_se_sh(adev, se, sh) (adev)->gfx.funcs->select_se_sh((adev), (se), (sh))



#define amdgpu_dpm_get_temperature(adev) \

	((adev)->pp_enabled ?						\

drivers/gpu/drm/amd/amdgpu/cik.c

+2 −2
Original line number Diff line number Diff line
@@ -1035,12 +1035,12 @@ static uint32_t cik_read_indexed_register(struct amdgpu_device *adev, 


	mutex_lock(&adev->grbm_idx_mutex);

	if (se_num != 0xffffffff || sh_num != 0xffffffff)

		gfx_v7_0_select_se_sh(adev, se_num, sh_num);

		amdgpu_gfx_select_se_sh(adev, se_num, sh_num);



	val = RREG32(reg_offset);



	if (se_num != 0xffffffff || sh_num != 0xffffffff)

		gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff);

		amdgpu_gfx_select_se_sh(adev, 0xffffffff, 0xffffffff);

	mutex_unlock(&adev->grbm_idx_mutex);

	return val;

}

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

+3 −1
Original line number Diff line number Diff line
@@ -1583,7 +1583,8 @@ static void gfx_v7_0_tiling_mode_table_init(struct amdgpu_device *adev) 
 * registers are instanced per SE or SH.  0xffffffff means

 * broadcast to all SEs or SHs (CIK).

 */

void gfx_v7_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num)

static void gfx_v7_0_select_se_sh(struct amdgpu_device *adev,

				  u32 se_num, u32 sh_num)

{

	u32 data = GRBM_GFX_INDEX__INSTANCE_BROADCAST_WRITES_MASK;
@@ -4200,6 +4201,7 @@ static void gfx_v7_0_ring_emit_gds_switch(struct amdgpu_ring *ring, 


static const struct amdgpu_gfx_funcs gfx_v7_0_gfx_funcs = {

	.get_gpu_clock_counter = &gfx_v7_0_get_gpu_clock_counter,

	.select_se_sh = &gfx_v7_0_select_se_sh,

};



static int gfx_v7_0_early_init(void *handle)

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.h

+0 −1
Original line number Diff line number Diff line
@@ -30,6 +30,5 @@ extern const struct amd_ip_funcs gfx_v7_0_ip_funcs; 
void gfx_v7_0_enter_rlc_safe_mode(struct amdgpu_device *adev);

void gfx_v7_0_exit_rlc_safe_mode(struct amdgpu_device *adev);

void gfx_v7_0_rlc_stop(struct amdgpu_device *adev);

void gfx_v7_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num);



#endif

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+3 −1
Original line number Diff line number Diff line
@@ -3446,7 +3446,8 @@ static void gfx_v8_0_tiling_mode_table_init(struct amdgpu_device *adev) 
	}

}



void gfx_v8_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num)

static void gfx_v8_0_select_se_sh(struct amdgpu_device *adev,

				  u32 se_num, u32 sh_num)

{

	u32 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1);
@@ -5209,6 +5210,7 @@ static void gfx_v8_0_ring_emit_gds_switch(struct amdgpu_ring *ring, 


static const struct amdgpu_gfx_funcs gfx_v8_0_gfx_funcs = {

	.get_gpu_clock_counter = &gfx_v8_0_get_gpu_clock_counter,

	.select_se_sh = &gfx_v8_0_select_se_sh,

};



static int gfx_v8_0_early_init(void *handle)