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Commit b95e31fd authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu: move get_gpu_clock_counter into the gfx struct 



It's gfx IP specific, not asic specific, so move to a
gfx callback.

Reviewed-by: default avatarChunming Zhou <david1.zhou@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 4b7d97ac

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+7 −3
Original line number Diff line number Diff line
@@ -1150,6 +1150,11 @@ struct amdgpu_cu_info { 
	uint32_t bitmap[4][4];

};



struct amdgpu_gfx_funcs {

	/* get the gpu clock counter */

	uint64_t (*get_gpu_clock_counter)(struct amdgpu_device *adev);

};



struct amdgpu_gfx {

	struct mutex			gpu_clock_mutex;

	struct amdgpu_gca_config	config;
@@ -1186,6 +1191,7 @@ struct amdgpu_gfx { 
	/* ce ram size*/

	unsigned			ce_ram_size;

	struct amdgpu_cu_info		cu_info;

	const struct amdgpu_gfx_funcs	*funcs;

};



int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm,
@@ -1829,8 +1835,6 @@ struct amdgpu_asic_funcs { 
	int (*reset)(struct amdgpu_device *adev);

	/* get the reference clock */

	u32 (*get_xclk)(struct amdgpu_device *adev);

	/* get the gpu clock counter */

	uint64_t (*get_gpu_clock_counter)(struct amdgpu_device *adev);

	/* MM block clocks */

	int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk);

	int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
@@ -2225,7 +2229,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring) 
#define amdgpu_asic_set_uvd_clocks(adev, v, d) (adev)->asic_funcs->set_uvd_clocks((adev), (v), (d))

#define amdgpu_asic_set_vce_clocks(adev, ev, ec) (adev)->asic_funcs->set_vce_clocks((adev), (ev), (ec))

#define amdgpu_asic_get_virtual_caps(adev) ((adev)->asic_funcs->get_virtual_caps((adev)))

#define amdgpu_asic_get_gpu_clock_counter(adev) (adev)->asic_funcs->get_gpu_clock_counter((adev))

#define amdgpu_asic_read_disabled_bios(adev) (adev)->asic_funcs->read_disabled_bios((adev))

#define amdgpu_asic_read_bios_from_rom(adev, b, l) (adev)->asic_funcs->read_bios_from_rom((adev), (b), (l))

#define amdgpu_asic_read_register(adev, se, sh, offset, v)((adev)->asic_funcs->read_register((adev), (se), (sh), (offset), (v)))
@@ -2278,6 +2281,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring) 
#define amdgpu_dpm_print_power_state(adev, ps) (adev)->pm.funcs->print_power_state((adev), (ps))

#define amdgpu_dpm_vblank_too_short(adev) (adev)->pm.funcs->vblank_too_short((adev))

#define amdgpu_dpm_enable_bapm(adev, e) (adev)->pm.funcs->enable_bapm((adev), (e))

#define amdgpu_gfx_get_gpu_clock_counter(adev) (adev)->gfx.funcs->get_gpu_clock_counter((adev))



#define amdgpu_dpm_get_temperature(adev) \

	((adev)->pp_enabled ?						\

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c

+2 −2
Original line number Diff line number Diff line
@@ -240,8 +240,8 @@ uint64_t get_gpu_clock_counter(struct kgd_dev *kgd) 
{

	struct amdgpu_device *rdev = (struct amdgpu_device *)kgd;



	if (rdev->asic_funcs->get_gpu_clock_counter)

		return rdev->asic_funcs->get_gpu_clock_counter(rdev);

	if (rdev->gfx.funcs->get_gpu_clock_counter)

		return rdev->gfx.funcs->get_gpu_clock_counter(rdev);

	return 0;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

+1 −1
Original line number Diff line number Diff line
@@ -347,7 +347,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file 
		return copy_to_user(out, &count, min(size, 4u)) ? -EFAULT : 0;

	}

	case AMDGPU_INFO_TIMESTAMP:

		ui64 = amdgpu_asic_get_gpu_clock_counter(adev);

		ui64 = amdgpu_gfx_get_gpu_clock_counter(adev);

		return copy_to_user(out, &ui64, min(size, 8u)) ? -EFAULT : 0;

	case AMDGPU_INFO_FW_VERSION: {

		struct drm_amdgpu_info_firmware fw_info;

drivers/gpu/drm/amd/amdgpu/cik.c

+0 −2
Original line number Diff line number Diff line
@@ -2022,8 +2022,6 @@ static const struct amdgpu_asic_funcs cik_asic_funcs = 
	.set_uvd_clocks = &cik_set_uvd_clocks,

	.set_vce_clocks = &cik_set_vce_clocks,

	.get_virtual_caps = &cik_get_virtual_caps,

	/* these should be moved to their own ip modules */

	.get_gpu_clock_counter = &gfx_v7_0_get_gpu_clock_counter,

};



static int cik_common_early_init(void *handle)

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

+6 −1
Original line number Diff line number Diff line
@@ -4138,7 +4138,7 @@ static void gfx_v7_0_fini_pg(struct amdgpu_device *adev) 
 * Fetches a GPU clock counter snapshot (SI).

 * Returns the 64 bit clock counter snapshot.

 */

uint64_t gfx_v7_0_get_gpu_clock_counter(struct amdgpu_device *adev)

static uint64_t gfx_v7_0_get_gpu_clock_counter(struct amdgpu_device *adev)

{

	uint64_t clock;
@@ -4198,12 +4198,17 @@ static void gfx_v7_0_ring_emit_gds_switch(struct amdgpu_ring *ring, 
	amdgpu_ring_write(ring, (1 << (oa_size + oa_base)) - (1 << oa_base));

}



static const struct amdgpu_gfx_funcs gfx_v7_0_gfx_funcs = {

	.get_gpu_clock_counter = &gfx_v7_0_get_gpu_clock_counter,

};



static int gfx_v7_0_early_init(void *handle)

{

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	adev->gfx.num_gfx_rings = GFX7_NUM_GFX_RINGS;

	adev->gfx.num_compute_rings = GFX7_NUM_COMPUTE_RINGS;

	adev->gfx.funcs = &gfx_v7_0_gfx_funcs;

	gfx_v7_0_set_ring_funcs(adev);

	gfx_v7_0_set_irq_funcs(adev);

	gfx_v7_0_set_gds_init(adev);