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Commit 03db21d0 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add GENI-IR node."

parents 02fd8f70 ae6539cd

Documentation/devicetree/bindings/media/msm-geni-ir.txt

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MSM Generic Serial Interface Infrared (GENI-IR) Controller



Required properties:

- compatible : Should be "qcom,msm-geni-ir"

- reg : Offset and length of the register region for the device

- reg-names : Register region name referenced in 'reg' above

	The only required register resource entry is:

	"base"       : GENI-IR controller register block

- interrupts : Interrupt numbers used by this controller

- interrupt-names : Interrupt resource names referenced in 'interrupts' above

	Required interrupt resource entries are:

	"geni-ir-core-irq"   : GENI-IR core interrupt

	"geni-ir-wakeup-irq" : GENI-IR wakeup interrupt

- qcom,geni-ir-gpio-tx  : GPIO pin number of the GENI-IR transmit line

- qcom,geni-ir-gpio-rx  : GPIO pin number of the GENI-IR receive line



Aliases :

Aliases may be optionally used for GENI-IR devices on a target.

The alias will have the following format:

	'geni_ir{n}' where n is the instance number.



GENI-IR device is the child device of the SPSS device.



Example:

	aliases {

		geni_ir1 = &geni_ir_1;

	};



	qcom,msm-spss@fc5c3000 {



		...



		geni_ir_1: qcom,msm-geni-ir@fc5c1000 {

			compatible = "qcom,msm-geni-ir";

			reg-names = "base";

			reg = <0xfc5c1000 0x1000>;

			interrupts = <0 284 0>, <0 285 0>;

			interrupt-names = "geni-ir-core-irq",

					  "geni-ir-wakeup-irq";

			qcom,geni-ir-gpio-tx = <&msmgpio 8 0>;

			qcom,geni-ir-gpio-rx = <&msmgpio 9 0>;

		};

	};

arch/arm64/boot/dts/qcom/qcs403.dtsi

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};



&soc {

	/delete-node/ qcom,msm-geni-ir;



	/delete-node/ qcom,msm-cpufreq;



	msm_cpufreq: qcom,msm-cpufreq {

arch/arm64/boot/dts/qcom/qcs405-pinctrl.dtsi

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			};

		};



		ir_in {

			ir_in_default: ir_in_default {

				mux {

					pins = "gpio77";

					function = "ir_in";

				};



				config {

					pins = "gpio77";

					drive-strength = <2>;   /* 2 mA */

					bias-disable;           /* no pull */

					input-enable;

				};

			};

		};



		/* WSA speaker reset pins */

		wsa_en_1_2 {

			wsa_en_1_2_sleep: wsa_en_1_2_sleep {

arch/arm64/boot/dts/qcom/qcs405.dtsi

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&usb3 {

	extcon = <&usb3_extcon>;

};



&soc {

	qcom,msm-geni-ir@740000 {

		compatible = "qcom,msm-geni-ir";

		reg-names = "base";

		reg = <0x740000 0x1000>;



		interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "geni-ir-core-irq";



		clocks = <&clock_gcc GCC_GENI_IR_H_CLK>,

			<&clock_gcc GCC_GENI_IR_S_CLK>;

		clock-names = "iface_clk", "serial_clk";



		pinctrl-names = "default";

		pinctrl-0 = <&ir_in_default>;



		resets = <&clock_gcc GCC_GENI_IR_BCR>;

		reset-names = "geni_reset";

	};

};

drivers/media/rc/Kconfig

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endif #RC_DEVICES



config IR_MSM_GENI

	tristate "MSM GENI IR Controller"

	depends on RC_CORE

	default m

	---help---

	   Say Y here to enable support for integrated infrared module

	   for MSM family processors.



	   To compile this driver as a module, choose M here: the

	   module will be called msm-geni-ir.



endif #RC_CORE