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Commit ae6539cd authored by Arindam Biswas's avatar Arindam Biswas Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add GENI-IR node. 



Adding GENI-IR node support for QCS405 platform.

Change-Id: I6aa1032d03ae4e9ba09e7d2266efb92029ceaec8
Signed-off-by: default avatarArindam Biswas <cabiswa@codeaurora.org>
parent 9c69b58a

arch/arm64/boot/dts/qcom/qcs403.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -20,6 +20,8 @@ 
};



&soc {

	/delete-node/ qcom,msm-geni-ir;



	/delete-node/ qcom,msm-cpufreq;



	msm_cpufreq: qcom,msm-cpufreq {

arch/arm64/boot/dts/qcom/qcs405-pinctrl.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -1350,6 +1350,22 @@ 
			};

		};



		ir_in {

			ir_in_default: ir_in_default {

				mux {

					pins = "gpio77";

					function = "ir_in";

				};



				config {

					pins = "gpio77";

					drive-strength = <2>;   /* 2 mA */

					bias-disable;           /* no pull */

					input-enable;

				};

			};

		};



		/* WSA speaker reset pins */

		wsa_en_1_2 {

			wsa_en_1_2_sleep: wsa_en_1_2_sleep {

arch/arm64/boot/dts/qcom/qcs405.dtsi

+21 −0
Original line number Diff line number Diff line
@@ -1395,3 +1395,24 @@ 
&usb3 {

	extcon = <&usb3_extcon>;

};



&soc {

	qcom,msm-geni-ir@740000 {

		compatible = "qcom,msm-geni-ir";

		reg-names = "base";

		reg = <0x740000 0x1000>;



		interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "geni-ir-core-irq";



		clocks = <&clock_gcc GCC_GENI_IR_H_CLK>,

			<&clock_gcc GCC_GENI_IR_S_CLK>;

		clock-names = "iface_clk", "serial_clk";



		pinctrl-names = "default";

		pinctrl-0 = <&ir_in_default>;



		resets = <&clock_gcc GCC_GENI_IR_BCR>;

		reset-names = "geni_reset";

	};

};