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Commit fee5429e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 

Pull crypto update from Herbert Xu:
 "Here is the crypto update for 3.20:

   - Added 192/256-bit key support to aesni GCM.
   - Added MIPS OCTEON MD5 support.
   - Fixed hwrng starvation and race conditions.
   - Added note that memzero_explicit is not a subsitute for memset.
   - Added user-space interface for crypto_rng.
   - Misc fixes"

* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (71 commits)
  crypto: tcrypt - do not allocate iv on stack for aead speed tests
  crypto: testmgr - limit IV copy length in aead tests
  crypto: tcrypt - fix buflen reminder calculation
  crypto: testmgr - mark rfc4106(gcm(aes)) as fips_allowed
  crypto: caam - fix resource clean-up on error path for caam_jr_init
  crypto: caam - pair irq map and dispose in the same function
  crypto: ccp - terminate ccp_support array with empty element
  crypto: caam - remove unused local variable
  crypto: caam - remove dead code
  crypto: caam - don't emit ICV check failures to dmesg
  hwrng: virtio - drop extra empty line
  crypto: replace scatterwalk_sg_next with sg_next
  crypto: atmel - Free memory in error path
  crypto: doc - remove colons in comments
  crypto: seqiv - Ensure that IV size is at least 8 bytes
  crypto: cts - Weed out non-CBC algorithms
  MAINTAINERS: add linux-crypto to hw random
  crypto: cts - Remove bogus use of seqiv
  crypto: qat - don't need qat_auth_state struct
  crypto: algif_rng - fix sparse non static symbol warning
  ...
parents 83e047c1 96692a73

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -4434,6 +4434,7 @@ F: include/linux/hwmon*.h 
HARDWARE RANDOM NUMBER GENERATOR CORE

M:	Matt Mackall <mpm@selenic.com>

M:	Herbert Xu <herbert@gondor.apana.org.au>

L:	linux-crypto@vger.kernel.org

S:	Odd fixes

F:	Documentation/hw_random.txt

F:	drivers/char/hw_random/

arch/mips/cavium-octeon/Makefile

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Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ obj-y := cpu.o setup.o octeon-platform.o octeon-irq.o csrc-octeon.o 
obj-y += dma-octeon.o

obj-y += octeon-memcpy.o

obj-y += executive/

obj-y += crypto/



obj-$(CONFIG_MTD)		      += flash_setup.o

obj-$(CONFIG_SMP)		      += smp.o

arch/mips/cavium-octeon/crypto/Makefile

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Original line number Diff line number Diff line 
#

# OCTEON-specific crypto modules.

#



obj-y += octeon-crypto.o



obj-$(CONFIG_CRYPTO_MD5_OCTEON) += octeon-md5.o

arch/mips/cavium-octeon/crypto/octeon-crypto.c

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+66 −0
Original line number Diff line number Diff line 
/*

 * This file is subject to the terms and conditions of the GNU General Public

 * License. See the file "COPYING" in the main directory of this archive

 * for more details.

 *

 * Copyright (C) 2004-2012 Cavium Networks

 */



#include <asm/cop2.h>

#include <linux/module.h>

#include <linux/interrupt.h>



#include "octeon-crypto.h"



/**

 * Enable access to Octeon's COP2 crypto hardware for kernel use. Wrap any

 * crypto operations in calls to octeon_crypto_enable/disable in order to make

 * sure the state of COP2 isn't corrupted if userspace is also performing

 * hardware crypto operations. Allocate the state parameter on the stack.

 * Preemption must be disabled to prevent context switches.

 *

 * @state: Pointer to state structure to store current COP2 state in.

 *

 * Returns: Flags to be passed to octeon_crypto_disable()

 */

unsigned long octeon_crypto_enable(struct octeon_cop2_state *state)

{

	int status;

	unsigned long flags;



	local_irq_save(flags);

	status = read_c0_status();

	write_c0_status(status | ST0_CU2);

	if (KSTK_STATUS(current) & ST0_CU2) {

		octeon_cop2_save(&(current->thread.cp2));

		KSTK_STATUS(current) &= ~ST0_CU2;

		status &= ~ST0_CU2;

	} else if (status & ST0_CU2) {

		octeon_cop2_save(state);

	}

	local_irq_restore(flags);

	return status & ST0_CU2;

}

EXPORT_SYMBOL_GPL(octeon_crypto_enable);



/**

 * Disable access to Octeon's COP2 crypto hardware in the kernel. This must be

 * called after an octeon_crypto_enable() before any context switch or return to

 * userspace.

 *

 * @state:	Pointer to COP2 state to restore

 * @flags:	Return value from octeon_crypto_enable()

 */

void octeon_crypto_disable(struct octeon_cop2_state *state,

			   unsigned long crypto_flags)

{

	unsigned long flags;



	local_irq_save(flags);

	if (crypto_flags & ST0_CU2)

		octeon_cop2_restore(state);

	else

		write_c0_status(read_c0_status() & ~ST0_CU2);

	local_irq_restore(flags);

}

EXPORT_SYMBOL_GPL(octeon_crypto_disable);

arch/mips/cavium-octeon/crypto/octeon-crypto.h

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Original line number Diff line number Diff line 
/*

 * This file is subject to the terms and conditions of the GNU General Public

 * License. See the file "COPYING" in the main directory of this archive

 * for more details.

 *

 * Copyright (C) 2012-2013 Cavium Inc., All Rights Reserved.

 *

 * MD5 instruction definitions added by Aaro Koskinen <aaro.koskinen@iki.fi>.

 *

 */

#ifndef __LINUX_OCTEON_CRYPTO_H

#define __LINUX_OCTEON_CRYPTO_H



#include <linux/sched.h>

#include <asm/mipsregs.h>



#define OCTEON_CR_OPCODE_PRIORITY 300



extern unsigned long octeon_crypto_enable(struct octeon_cop2_state *state);

extern void octeon_crypto_disable(struct octeon_cop2_state *state,

				  unsigned long flags);



/*

 * Macros needed to implement MD5:

 */



/*

 * The index can be 0-1.

 */

#define write_octeon_64bit_hash_dword(value, index)	\

do {							\

	__asm__ __volatile__ (				\

	"dmtc2 %[rt],0x0048+" STR(index)		\

	:						\

	: [rt] "d" (value));				\

} while (0)



/*

 * The index can be 0-1.

 */

#define read_octeon_64bit_hash_dword(index)		\

({							\

	u64 __value;					\

							\

	__asm__ __volatile__ (				\

	"dmfc2 %[rt],0x0048+" STR(index)		\

	: [rt] "=d" (__value)				\

	: );						\

							\

	__value;					\

})



/*

 * The index can be 0-6.

 */

#define write_octeon_64bit_block_dword(value, index)	\

do {							\

	__asm__ __volatile__ (				\

	"dmtc2 %[rt],0x0040+" STR(index)		\

	:						\

	: [rt] "d" (value));				\

} while (0)



/*

 * The value is the final block dword (64-bit).

 */

#define octeon_md5_start(value)				\

do {							\

	__asm__ __volatile__ (				\

	"dmtc2 %[rt],0x4047"				\

	:						\

	: [rt] "d" (value));				\

} while (0)



#endif /* __LINUX_OCTEON_CRYPTO_H */