Merge branch 'akpm' (patches from Andrew)

Compatible		Vendor / Chip

==========		=============

abracon,abb5zes3		AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface

ad,ad7414		SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin

ad,adm9240		ADM9240:  Complete System Hardware Monitor for uProcessor-Based Systems

adi,adt7461		+/-1C TDM Extended Temp Range I.C

* Real Time Clock of the Armada 38x SoCs

RTC controller for the Armada 38x SoCs

Required properties:

- compatible : Should be "marvell,armada-380-rtc"

- reg: a list of base address and size pairs, one for each entry in

  reg-names

- reg names: should contain:

  * "rtc" for the RTC registers

  * "rtc-soc" for the SoC related registers and among them the one

    related to the interrupt.

- interrupts: IRQ line for the RTC.

Example:

rtc@a3800 {

	compatible = "marvell,armada-380-rtc";

	reg = <0xa3800 0x20>, <0x184a0 0x0c>;

	reg-names = "rtc", "rtc-soc";

	interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;

};

Intersil ISL12057 I2C RTC/Alarm chip

ISL12057 is a trivial I2C device (it has simple device tree bindings,

consisting of a compatible field, an address and possibly an interrupt

line).

Nonetheless, it also supports an option boolean property

("isil,irq2-can-wakeup-machine") to handle the specific use-case found

on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104

and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip

(associated with the alarm supported by the driver) is not connected

to the SoC but to a PMIC. It allows the device to be powered up when

RTC alarm rings. In order to mark the device has a wakeup source and

get access to the 'wakealarm' sysfs entry, this specific property can

be set when the IRQ#2 pin of the chip is not connected to the SoC but

can wake up the device.

Required properties supported by the device:

 - "compatible": must be "isil,isl12057"

 - "reg": I2C bus address of the device

Optional properties:

 - "isil,irq2-can-wakeup-machine": mark the chip as a wakeup source,

   independently of the availability of an IRQ line connected to the

   SoC.

 - "interrupt-parent", "interrupts": for passing the interrupt line

   of the SoC connected to IRQ#2 of the RTC chip.

Example isl12057 node without IRQ#2 pin connected (no alarm support):

	isl12057: isl12057@68 {

		compatible = "isil,isl12057";

		reg = <0x68>;

	};

Example isl12057 node with IRQ#2 pin connected to main SoC via MPP6 (note

that the pinctrl-related properties below are given for completeness and

may not be required or may be different depending on your system or

SoC, and the main function of the MPP used as IRQ line, i.e.

"interrupt-parent" and "interrupts" are usually sufficient):

		    pinctrl {

				...

				rtc_alarm_pin: rtc_alarm_pin {

					marvell,pins = "mpp6";

					marvell,function = "gpio";

				};

				...

		    };

	...

	isl12057: isl12057@68 {

		compatible = "isil,isl12057";

		reg = <0x68>;

		pinctrl-0 = <&rtc_alarm_pin>;

		pinctrl-names = "default";

		interrupt-parent = <&gpio0>;

		interrupts = <6 IRQ_TYPE_EDGE_FALLING>;

	};

Example isl12057 node without IRQ#2 pin connected to the SoC but to a

PMIC, allowing the device to be started based on configured alarm:

	isl12057: isl12057@68 {

		compatible = "isil,isl12057";

		reg = <0x68>;

		isil,irq2-can-wakeup-machine;

	};

NXP PCF2123 SPI Real Time Clock

Required properties:

- compatible: should be: "nxp,rtc-pcf2123"

- reg: should be the SPI slave chipselect address

Optional properties:

- spi-cs-high: PCF2123 needs chipselect high

Example:

rtc: nxp,rtc-pcf2123@3 {

	compatible = "nxp,rtc-pcf2123"

	reg = <3>

	spi-cs-high;

};

using them to avoid name-space collisions.

abilis	Abilis Systems

abcn	Abracon Corporation

active-semi	Active-Semi International Inc

ad	Avionic Design GmbH

adapteva	Adapteva, Inc.