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Commit fa715319 authored by Christopher Covington's avatar Christopher Covington Committed by Will Deacon
Browse files

arm64: Use __tlbi() macros in KVM code 



Refactor the KVM code to use the __tlbi macros, which will allow an errata
workaround that repeats tlbi dsb sequences to only change one location.
This is not intended to change the generated assembly and comparing before
and after vmlinux objdump shows no functional changes.

Acked-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: default avatarChristopher Covington <cov@codeaurora.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent ea5f9d1a

arch/arm64/kvm/hyp/tlb.c

+7 −6
Original line number Original line Diff line number Diff line
@@ -16,6 +16,7 @@ 
 */

 */





#include <asm/kvm_hyp.h>

#include <asm/kvm_hyp.h>

#include <asm/tlbflush.h>





void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)

void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)

{

{
@@ -32,7 +33,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) 
	 * whole of Stage-1. Weep...

	 * whole of Stage-1. Weep...

	 */

	 */

	ipa >>= 12;

	ipa >>= 12;

	asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa));

	__tlbi(ipas2e1is, ipa);





	/*

	/*

	 * We have to ensure completion of the invalidation at Stage-2,

	 * We have to ensure completion of the invalidation at Stage-2,
@@ -41,7 +42,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) 
	 * the Stage-1 invalidation happened first.

	 * the Stage-1 invalidation happened first.

	 */

	 */

	dsb(ish);

	dsb(ish);

	asm volatile("tlbi vmalle1is" : : );

	__tlbi(vmalle1is);

	dsb(ish);

	dsb(ish);

	isb();

	isb();
@@ -57,7 +58,7 @@ void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm) 
	write_sysreg(kvm->arch.vttbr, vttbr_el2);

	write_sysreg(kvm->arch.vttbr, vttbr_el2);

	isb();

	isb();





	asm volatile("tlbi vmalls12e1is" : : );

	__tlbi(vmalls12e1is);

	dsb(ish);

	dsb(ish);

	isb();

	isb();
@@ -72,7 +73,7 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu) 
	write_sysreg(kvm->arch.vttbr, vttbr_el2);

	write_sysreg(kvm->arch.vttbr, vttbr_el2);

	isb();

	isb();





	asm volatile("tlbi vmalle1" : : );

	__tlbi(vmalle1);

	dsb(nsh);

	dsb(nsh);

	isb();

	isb();
@@ -82,7 +83,7 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu) 
void __hyp_text __kvm_flush_vm_context(void)

void __hyp_text __kvm_flush_vm_context(void)

{

{

	dsb(ishst);

	dsb(ishst);

	asm volatile("tlbi alle1is	\n"

	__tlbi(alle1is);

		     "ic ialluis	  ": : );

	asm volatile("ic ialluis" : : );

	dsb(ish);

	dsb(ish);

}
 
}