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Commit ea5f9d1a authored by Shanker Donthineni's avatar Shanker Donthineni Committed by Will Deacon
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arm64: Define Falkor v1 CPU 



Define the MIDR implementer and part number field values for the Qualcomm
Datacenter Technologies Falkor processor version 1 in the usual manner.

Signed-off-by: default avatarShanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: default avatarChristopher Covington <cov@codeaurora.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent adbe7e26

arch/arm64/include/asm/cputype.h

+4 −0
Original line number Diff line number Diff line
@@ -74,6 +74,7 @@ 
#define ARM_CPU_IMP_APM			0x50

#define ARM_CPU_IMP_CAVIUM		0x43

#define ARM_CPU_IMP_BRCM		0x42

#define ARM_CPU_IMP_QCOM		0x51



#define ARM_CPU_PART_AEM_V8		0xD0F

#define ARM_CPU_PART_FOUNDATION		0xD00
@@ -87,10 +88,13 @@ 


#define BRCM_CPU_PART_VULCAN		0x516



#define QCOM_CPU_PART_FALKOR_V1		0x800



#define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)

#define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)

#define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)

#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)

#define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1)



#ifndef __ASSEMBLY__