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Commit f93f0c3a authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/powerplay: use struct amd_pm_funcs in powerplay 



Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent cfa289fd

drivers/gpu/drm/amd/include/amd_shared.h

+15 −0
Original line number Diff line number Diff line
@@ -257,6 +257,10 @@ struct amd_ip_funcs { 
	void (*get_clockgating_state)(void *handle, u32 *flags);

};



enum amd_pp_task;



struct pp_states_info;



struct amd_pm_funcs {

	int (*get_temperature)(void *handle);

	int (*pre_set_power_state)(void *handle);
@@ -298,6 +302,17 @@ struct amd_pm_funcs { 
			struct amd_pp_profile *request);

	int (*switch_power_profile)(void *handle,

			enum amd_pp_profile_type type);

	int (*load_firmware)(void *handle);

	int (*wait_for_fw_loading_complete)(void *handle);

	enum amd_dpm_forced_level (*get_performance_level)(void *handle);

	enum amd_pm_state_type (*get_current_power_state)(void *handle);

	int (*dispatch_tasks)(void *handle, enum amd_pp_task task_id,

				   void *input, void *output);

	int (*get_fan_speed_rpm)(void *handle, uint32_t *rpm);

	int (*get_pp_num_states)(void *handle, struct pp_states_info *data);

	int (*get_pp_table)(void *handle, char **table);

	int (*set_pp_table)(void *handle, const char *buf, size_t size);

};





#endif /* __AMD_SHARED_H__ */

drivers/gpu/drm/amd/powerplay/amd_powerplay.c

+25 −25
Original line number Diff line number Diff line
@@ -376,11 +376,12 @@ static enum amd_dpm_forced_level pp_dpm_get_performance_level( 
	return level;

}



static int pp_dpm_get_sclk(void *handle, bool low)

static uint32_t pp_dpm_get_sclk(void *handle, bool low)

{

	struct pp_hwmgr  *hwmgr;

	struct pp_instance *pp_handle = (struct pp_instance *)handle;

	int ret = 0;

	uint32_t clk = 0;



	ret = pp_check(pp_handle);
@@ -394,16 +395,17 @@ static int pp_dpm_get_sclk(void *handle, bool low) 
		return 0;

	}

	mutex_lock(&pp_handle->pp_lock);

	ret = hwmgr->hwmgr_func->get_sclk(hwmgr, low);

	clk = hwmgr->hwmgr_func->get_sclk(hwmgr, low);

	mutex_unlock(&pp_handle->pp_lock);

	return ret;

	return clk;

}



static int pp_dpm_get_mclk(void *handle, bool low)

static uint32_t pp_dpm_get_mclk(void *handle, bool low)

{

	struct pp_hwmgr  *hwmgr;

	struct pp_instance *pp_handle = (struct pp_instance *)handle;

	int ret = 0;

	uint32_t clk = 0;



	ret = pp_check(pp_handle);
@@ -417,12 +419,12 @@ static int pp_dpm_get_mclk(void *handle, bool low) 
		return 0;

	}

	mutex_lock(&pp_handle->pp_lock);

	ret = hwmgr->hwmgr_func->get_mclk(hwmgr, low);

	clk = hwmgr->hwmgr_func->get_mclk(hwmgr, low);

	mutex_unlock(&pp_handle->pp_lock);

	return ret;

	return clk;

}



static int pp_dpm_powergate_vce(void *handle, bool gate)

static void pp_dpm_powergate_vce(void *handle, bool gate)

{

	struct pp_hwmgr  *hwmgr;

	struct pp_instance *pp_handle = (struct pp_instance *)handle;
@@ -431,21 +433,20 @@ static int pp_dpm_powergate_vce(void *handle, bool gate) 
	ret = pp_check(pp_handle);



	if (ret != 0)

		return ret;

		return;



	hwmgr = pp_handle->hwmgr;



	if (hwmgr->hwmgr_func->powergate_vce == NULL) {

		pr_info("%s was not implemented.\n", __func__);

		return 0;

		return;

	}

	mutex_lock(&pp_handle->pp_lock);

	ret = hwmgr->hwmgr_func->powergate_vce(hwmgr, gate);

	hwmgr->hwmgr_func->powergate_vce(hwmgr, gate);

	mutex_unlock(&pp_handle->pp_lock);

	return ret;

}



static int pp_dpm_powergate_uvd(void *handle, bool gate)

static void pp_dpm_powergate_uvd(void *handle, bool gate)

{

	struct pp_hwmgr  *hwmgr;

	struct pp_instance *pp_handle = (struct pp_instance *)handle;
@@ -454,18 +455,17 @@ static int pp_dpm_powergate_uvd(void *handle, bool gate) 
	ret = pp_check(pp_handle);



	if (ret != 0)

		return ret;

		return;



	hwmgr = pp_handle->hwmgr;



	if (hwmgr->hwmgr_func->powergate_uvd == NULL) {

		pr_info("%s was not implemented.\n", __func__);

		return 0;

		return;

	}

	mutex_lock(&pp_handle->pp_lock);

	ret = hwmgr->hwmgr_func->powergate_uvd(hwmgr, gate);

	hwmgr->hwmgr_func->powergate_uvd(hwmgr, gate);

	mutex_unlock(&pp_handle->pp_lock);

	return ret;

}



static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,
@@ -530,7 +530,7 @@ static enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle) 
	return pm_type;

}



static int pp_dpm_set_fan_control_mode(void *handle, uint32_t mode)

static void pp_dpm_set_fan_control_mode(void *handle, uint32_t mode)

{

	struct pp_hwmgr  *hwmgr;

	struct pp_instance *pp_handle = (struct pp_instance *)handle;
@@ -539,25 +539,25 @@ static int pp_dpm_set_fan_control_mode(void *handle, uint32_t mode) 
	ret = pp_check(pp_handle);



	if (ret != 0)

		return ret;

		return;



	hwmgr = pp_handle->hwmgr;



	if (hwmgr->hwmgr_func->set_fan_control_mode == NULL) {

		pr_info("%s was not implemented.\n", __func__);

		return 0;

		return;

	}

	mutex_lock(&pp_handle->pp_lock);

	ret = hwmgr->hwmgr_func->set_fan_control_mode(hwmgr, mode);

	hwmgr->hwmgr_func->set_fan_control_mode(hwmgr, mode);

	mutex_unlock(&pp_handle->pp_lock);

	return ret;

}



static int pp_dpm_get_fan_control_mode(void *handle)

static uint32_t pp_dpm_get_fan_control_mode(void *handle)

{

	struct pp_hwmgr  *hwmgr;

	struct pp_instance *pp_handle = (struct pp_instance *)handle;

	int ret = 0;

	uint32_t mode = 0;



	ret = pp_check(pp_handle);
@@ -571,9 +571,9 @@ static int pp_dpm_get_fan_control_mode(void *handle) 
		return 0;

	}

	mutex_lock(&pp_handle->pp_lock);

	ret = hwmgr->hwmgr_func->get_fan_control_mode(hwmgr);

	mode = hwmgr->hwmgr_func->get_fan_control_mode(hwmgr);

	mutex_unlock(&pp_handle->pp_lock);

	return ret;

	return mode;

}



static int pp_dpm_set_fan_speed_percent(void *handle, uint32_t percent)
@@ -1096,7 +1096,7 @@ static int pp_dpm_switch_power_profile(void *handle, 
	return 0;

}



const struct amd_powerplay_funcs pp_dpm_funcs = {

const struct amd_pm_funcs pp_dpm_funcs = {

	.get_temperature = pp_dpm_get_temperature,

	.load_firmware = pp_dpm_load_fw,

	.wait_for_fw_loading_complete = pp_dpm_fw_loading_complete,

drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c

+2 −6
Original line number Diff line number Diff line
@@ -147,7 +147,7 @@ int cz_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable) 
}





int cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)

void cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)

{

	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
@@ -173,10 +173,9 @@ int cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate) 
		cz_dpm_update_uvd_dpm(hwmgr, false);

	}



	return 0;

}



int cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)

void cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)

{

	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
@@ -205,9 +204,6 @@ int cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate) 
					AMD_CG_STATE_UNGATE);

		cz_dpm_update_vce_dpm(hwmgr);

		cz_enable_disable_vce_dpm(hwmgr, true);

		return 0;

	}



	return 0;

}

drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.h

+2 −2
Original line number Diff line number Diff line
@@ -29,8 +29,8 @@ 


extern int cz_phm_set_asic_block_gating(struct pp_hwmgr *hwmgr, enum PHM_AsicBlock block, enum PHM_ClockGateSetting gating);

extern const struct phm_master_table_header cz_phm_enable_clock_power_gatings_master;

extern int cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate);

extern int cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate);

extern void cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate);

extern void cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate);

extern int cz_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable);

extern int cz_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable);

#endif /* _CZ_CLOCK_POWER_GATING_H_ */

drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c

+2 −2
Original line number Diff line number Diff line
@@ -1393,14 +1393,14 @@ int cz_dpm_powerup_vce(struct pp_hwmgr *hwmgr) 
	return 0;

}



static int cz_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low)

static uint32_t cz_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low)

{

	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);



	return cz_hwmgr->sys_info.bootup_uma_clock;

}



static int cz_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low)

static uint32_t cz_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low)

{

	struct pp_power_state  *ps;

	struct cz_power_state  *cz_ps;