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Commit ee7a99c7 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amdgpu: correct SMU11 SYSPLL0 clock id values 



The SMU11 SYSPLL0 clock ids were assigned wrong values.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ee5309d5

drivers/gpu/drm/amd/include/atomfirmware.h

+5 −7
Original line number Diff line number Diff line
@@ -2026,17 +2026,15 @@ enum atom_smu11_syspll_id { 
  SMU11_SYSPLL3_1_ID          = 6,

};





enum atom_smu11_syspll0_clock_id {

  SMU11_SYSPLL0_SOCCLK_ID   = 0,       //	SOCCLK

  SMU11_SYSPLL0_MP0CLK_ID   = 1,       //	MP0CLK

  SMU11_SYSPLL0_DCLK_ID     = 2,       //	DCLK

  SMU11_SYSPLL0_VCLK_ID     = 3,       //	VCLK

  SMU11_SYSPLL0_ECLK_ID     = 4,       //	ECLK

  SMU11_SYSPLL0_ECLK_ID     = 0,       //	ECLK

  SMU11_SYSPLL0_SOCCLK_ID   = 1,       //	SOCCLK

  SMU11_SYSPLL0_MP0CLK_ID   = 2,       //	MP0CLK

  SMU11_SYSPLL0_DCLK_ID     = 3,       //	DCLK

  SMU11_SYSPLL0_VCLK_ID     = 4,       //	VCLK

  SMU11_SYSPLL0_DCEFCLK_ID  = 5,       //	DCEFCLK

};





enum atom_smu11_syspll1_0_clock_id {

  SMU11_SYSPLL1_0_UCLKA_ID   = 0,       // UCLK_a

};