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Commit ec366cd1 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-for-v4.9-rc2-part2' of git://people.freedesktop.org/~airlied/linux 

Pull more drm fixes from Dave Airlie:
 "Mainly some vmwgfx fixes, but also some fixes for armada, etnaviv and
  fsl-dcu"

* tag 'drm-fixes-for-v4.9-rc2-part2' of git://people.freedesktop.org/~airlied/linux:
  drm/fsl-dcu: enable pixel clock when enabling CRTC
  drm/fsl-dcu: do not transfer registers in mode_set_nofb
  drm/fsl-dcu: do not transfer registers on plane init
  drm/fsl-dcu: enable TCON bypass mode by default
  drm/vmwgfx: Adjust checks for null pointers in 13 functions
  drm/vmwgfx: Use memdup_user() rather than duplicating its implementation
  drm/vmwgfx: Use kmalloc_array() in vmw_surface_define_ioctl()
  drm/vmwgfx: Avoid validating views on view destruction
  drm/vmwgfx: Limit the user-space command buffer size
  drm/vmwgfx: Remove a leftover debug printout
  drm/vmwgfx: Allow resource relocations on byte boundaries
  drm/vmwgfx: Enable SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER command
  drm/vmwgfx: Remove call to reservation_object_test_signaled_rcu before wait
  drm/vmwgfx: Replace numeric parameter like 0444 with macro
  drm/etnaviv: block 64K of address space behind each cmdstream
  drm/etnaviv: ensure write caches are flushed at end of user cmdstream
  drm/armada: fix clock counts
parents 6f33d645 26beaee9

drivers/gpu/drm/armada/armada_crtc.c

+10 −8
Original line number Diff line number Diff line
@@ -332,17 +332,19 @@ static void armada_drm_crtc_dpms(struct drm_crtc *crtc, int dpms) 
{

	struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);



	if (dcrtc->dpms != dpms) {

		dcrtc->dpms = dpms;

		if (!IS_ERR(dcrtc->clk) && !dpms_blanked(dpms))

			WARN_ON(clk_prepare_enable(dcrtc->clk));

		armada_drm_crtc_update(dcrtc);

		if (!IS_ERR(dcrtc->clk) && dpms_blanked(dpms))

			clk_disable_unprepare(dcrtc->clk);

	if (dpms_blanked(dcrtc->dpms) != dpms_blanked(dpms)) {

		if (dpms_blanked(dpms))

			armada_drm_vblank_off(dcrtc);

		else

		else if (!IS_ERR(dcrtc->clk))

			WARN_ON(clk_prepare_enable(dcrtc->clk));

		dcrtc->dpms = dpms;

		armada_drm_crtc_update(dcrtc);

		if (!dpms_blanked(dpms))

			drm_crtc_vblank_on(&dcrtc->crtc);

		else if (!IS_ERR(dcrtc->clk))

			clk_disable_unprepare(dcrtc->clk);

	} else if (dcrtc->dpms != dpms) {

		dcrtc->dpms = dpms;

	}

}

drivers/gpu/drm/etnaviv/etnaviv_buffer.c

+19 −5
Original line number Diff line number Diff line
@@ -329,20 +329,34 @@ void etnaviv_buffer_queue(struct etnaviv_gpu *gpu, unsigned int event, 
	/*

	 * Append a LINK to the submitted command buffer to return to

	 * the ring buffer.  return_target is the ring target address.

	 * We need three dwords: event, wait, link.

	 * We need at most 7 dwords in the return target: 2 cache flush +

	 * 2 semaphore stall + 1 event + 1 wait + 1 link.

	 */

	return_dwords = 3;

	return_dwords = 7;

	return_target = etnaviv_buffer_reserve(gpu, buffer, return_dwords);

	CMD_LINK(cmdbuf, return_dwords, return_target);



	/*

	 * Append event, wait and link pointing back to the wait

	 * command to the ring buffer.

	 * Append a cache flush, stall, event, wait and link pointing back to

	 * the wait command to the ring buffer.

	 */

	if (gpu->exec_state == ETNA_PIPE_2D) {

		CMD_LOAD_STATE(buffer, VIVS_GL_FLUSH_CACHE,

				       VIVS_GL_FLUSH_CACHE_PE2D);

	} else {

		CMD_LOAD_STATE(buffer, VIVS_GL_FLUSH_CACHE,

				       VIVS_GL_FLUSH_CACHE_DEPTH |

				       VIVS_GL_FLUSH_CACHE_COLOR);

		CMD_LOAD_STATE(buffer, VIVS_TS_FLUSH_CACHE,

				       VIVS_TS_FLUSH_CACHE_FLUSH);

	}

	CMD_SEM(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE);

	CMD_STALL(buffer, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE);

	CMD_LOAD_STATE(buffer, VIVS_GL_EVENT, VIVS_GL_EVENT_EVENT_ID(event) |

		       VIVS_GL_EVENT_FROM_PE);

	CMD_WAIT(buffer);

	CMD_LINK(buffer, 2, return_target + 8);

	CMD_LINK(buffer, 2, etnaviv_iommu_get_cmdbuf_va(gpu, buffer) +

			    buffer->user_size - 4);



	if (drm_debug & DRM_UT_DRIVER)

		pr_info("stream link to 0x%08x @ 0x%08x %p\n",

drivers/gpu/drm/etnaviv/etnaviv_mmu.c

+2 −1
Original line number Diff line number Diff line
@@ -330,7 +330,8 @@ u32 etnaviv_iommu_get_cmdbuf_va(struct etnaviv_gpu *gpu, 
			return (u32)buf->vram_node.start;



		mutex_lock(&mmu->lock);

		ret = etnaviv_iommu_find_iova(mmu, &buf->vram_node, buf->size);

		ret = etnaviv_iommu_find_iova(mmu, &buf->vram_node,

					      buf->size + SZ_64K);

		if (ret < 0) {

			mutex_unlock(&mmu->lock);

			return 0;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c

+2 −2
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ static void fsl_dcu_drm_disable_crtc(struct drm_crtc *crtc) 
			   DCU_MODE_DCU_MODE(DCU_MODE_OFF));

	regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,

		     DCU_UPDATE_MODE_READREG);

	clk_disable_unprepare(fsl_dev->pix_clk);

}



static void fsl_dcu_drm_crtc_enable(struct drm_crtc *crtc)
@@ -58,6 +59,7 @@ static void fsl_dcu_drm_crtc_enable(struct drm_crtc *crtc) 
	struct drm_device *dev = crtc->dev;

	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;



	clk_prepare_enable(fsl_dev->pix_clk);

	regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,

			   DCU_MODE_DCU_MODE_MASK,

			   DCU_MODE_DCU_MODE(DCU_MODE_NORMAL));
@@ -116,8 +118,6 @@ static void fsl_dcu_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) 
		     DCU_THRESHOLD_LS_BF_VS(BF_VS_VAL) |

		     DCU_THRESHOLD_OUT_BUF_HIGH(BUF_MAX_VAL) |

		     DCU_THRESHOLD_OUT_BUF_LOW(BUF_MIN_VAL));

	regmap_write(fsl_dev->regmap, DCU_UPDATE_MODE,

		     DCU_UPDATE_MODE_READREG);

	return;

}

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c

+3 −20
Original line number Diff line number Diff line
@@ -267,12 +267,8 @@ static int fsl_dcu_drm_pm_resume(struct device *dev) 
		return ret;

	}



	ret = clk_prepare_enable(fsl_dev->pix_clk);

	if (ret < 0) {

		dev_err(dev, "failed to enable pix clk\n");

		goto disable_dcu_clk;

	}



	if (fsl_dev->tcon)

		fsl_tcon_bypass_enable(fsl_dev->tcon);

	fsl_dcu_drm_init_planes(fsl_dev->drm);

	drm_atomic_helper_resume(fsl_dev->drm, fsl_dev->state);
@@ -284,10 +280,6 @@ static int fsl_dcu_drm_pm_resume(struct device *dev) 
	enable_irq(fsl_dev->irq);



	return 0;



disable_dcu_clk:

	clk_disable_unprepare(fsl_dev->clk);

	return ret;

}

#endif
@@ -401,18 +393,12 @@ static int fsl_dcu_drm_probe(struct platform_device *pdev) 
		goto disable_clk;

	}



	ret = clk_prepare_enable(fsl_dev->pix_clk);

	if (ret < 0) {

		dev_err(dev, "failed to enable pix clk\n");

		goto unregister_pix_clk;

	}



	fsl_dev->tcon = fsl_tcon_init(dev);



	drm = drm_dev_alloc(driver, dev);

	if (IS_ERR(drm)) {

		ret = PTR_ERR(drm);

		goto disable_pix_clk;

		goto unregister_pix_clk;

	}



	fsl_dev->dev = dev;
@@ -433,8 +419,6 @@ static int fsl_dcu_drm_probe(struct platform_device *pdev) 


unref:

	drm_dev_unref(drm);

disable_pix_clk:

	clk_disable_unprepare(fsl_dev->pix_clk);

unregister_pix_clk:

	clk_unregister(fsl_dev->pix_clk);

disable_clk:
@@ -447,7 +431,6 @@ static int fsl_dcu_drm_remove(struct platform_device *pdev) 
	struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);



	clk_disable_unprepare(fsl_dev->clk);

	clk_disable_unprepare(fsl_dev->pix_clk);

	clk_unregister(fsl_dev->pix_clk);

	drm_put_dev(fsl_dev->drm);