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Commit ea056c14 authored by Jesse Barnes's avatar Jesse Barnes Committed by Chris Wilson
Browse files

drm/i915: enable thermal reporting for IPS 



Thermal reporting may not be enabled by default on some machines, so
enable the appropriate bits to allow IPS to get the data it needs from
the CPU thermal device.

Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
parent 8b3016c4

drivers/gpu/drm/i915/i915_reg.h

+4 −0
Original line number Diff line number Diff line
@@ -928,6 +928,8 @@ 
#define CLKCFG_MEM_800					(3 << 4)

#define CLKCFG_MEM_MASK					(7 << 4)



#define TSC1			0x11001

#define   TSE			(1<<0)

#define TR1			0x11006

#define TSFS			0x11020

#define   TSFS_SLOPE_MASK	0x0000ff00
@@ -1072,6 +1074,8 @@ 
#define   MEMSTAT_SRC_CTL_STDBY 3

#define RCPREVBSYTUPAVG		0x113b8

#define RCPREVBSYTDNAVG		0x113bc

#define PMMISC			0x11214

#define   MCPPCE_EN		(1<<0) /* enable PM_MSG from PCH->MPC */

#define SDEW			0x1124c

#define CSIEW0			0x11250

#define CSIEW1			0x11254

drivers/gpu/drm/i915/intel_display.c

+4 −0
Original line number Diff line number Diff line
@@ -5635,6 +5635,10 @@ void ironlake_enable_drps(struct drm_device *dev) 
	u32 rgvmodectl = I915_READ(MEMMODECTL);

	u8 fmax, fmin, fstart, vstart;



	/* Enable temp reporting */

	I915_WRITE16(PMMISC, I915_READ(PMMISC) | MCPPCE_EN);

	I915_WRITE16(TSC1, I915_READ(TSC1) | TSE);



	/* 100ms RC evaluation intervals */

	I915_WRITE(RCUPEI, 100000);

	I915_WRITE(RCDNEI, 100000);